Fan-out, display substrate having the same and method for manufacturing the display substrate

A display substrate, comprising:

• a fan-out comprising:
• an insulating substrate;
• a first line disposed on the insulating substrate and connected to a pad;
• a second line spaced apart from the first line and formed from the same layer as the first line and connected to a thin-film transistor;
• a resistance control pattern formed from a different layer than the first line and the second line;
• and
• a first detour pattern and a second detour pattern spaced apart from the first detour pattern, and the first detour pattern and the second detour pattern being formed from a different layer than the first line, the second line, and the resistance control pattern, the first detour pattern electrically connecting the first line to the resistance control pattern, the second detour pattern electrically connecting the second line to the resistance control pattern so that the first line and the second line are electrically connected to each other through the resistance control pattern;
• and
• a gate line or a data line connected to the fan-out.

A method for manufacturing a display substrate, the method comprising:

• forming a first line and a second line;
• forming a first insulating layer on the first line and the second line;
• forming a first contact hole through the first insulating layer to expose the first line or the second line;
• forming a first detour pattern connected to the first line through the first contact hole or a second detour pattern connected to the second line through the first contact hole;
• forming a second insulating layer on the first detour pattern or the second detour pattern;
• forming a second contact hole through the second insulating layer to exposed the first detour pattern or the second detour patter;
• and
• forming a resistance control pattern connected to the first detour pattern or the second detour pattern through the second contact hole.

A method for manufacturing a display substrate, the method comprising:

• forming a first line and a second line;
• forming a first insulating layer on the first line and the second line;
• forming a first detour pattern or a second detour pattern on the first insulating layer;
• forming a second insulating layer on the first detour pattern or the second detour pattern;
• patterning the first insulating layer to form contact holes exposing the first line and the second line, and patterning the second insulating layer to form a contact hole exposing the first detour pattern or the second detour pattern;
• and
• forming a resistance control pattern connected to the first detour pattern or the second detour pattern via the contact hole in the second insulating layer.