High-K metal gate structure fabrication method including hard mask

A method of fabricating a semiconductor device, comprising:

• forming a first hard mask layer and a second hard mask layer on a substrate;
• forming a sacrificial polysilicon gate on the substrate, wherein the forming the sacrificial polysilicon gate on the substrate includes using at least one of the first hard mask layer and the second hard mask layer to pattern the sacrificial polysilicon gate;
• forming a source and a drain region adjacent the sacrificial polysilicon gate;
• and
• forming a contact on the source and the drain region, wherein the forming the contact includes preventing a silicide from forming on the sacrificial polysilicon gate using at least one of the first and the second hard mask layers;
• removing the first hard mask layer after forming the contact;
• depositing a dielectric layer overlying the sacrificial polysilicon gate;
• and
• removing at least a portion of the deposited dielectric layer using the second hard mask layer as a stop layer, wherein the removing includes continuing the removal of the deposited dielectric layer past an endpoint to remove the second hard mask layer.

A method of fabricating a semiconductor device, comprising:

• providing a substrate;
• forming a first hard mask layer on the substrate;
• forming a second hard mask layer on the substrate and overlying the first hard mask layer;
• forming a strained region on the substrate;
• removing the second hard mask layer after forming the strained region;
• and
• forming at least one of a source and a drain in the strained region after removing the second hard mask layer.