Large substrate structural vias
AssigneeResearch Triangle Institute
InventorRobert O. Conn
Life of this patent
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Abstract
An electronic package and methods by which the package reduces thermal fatigue failure of conductors in the electronic package. The electronic package includes a carrier substrate having first and second surfaces and a plurality of anchor vias having a via material extending from the first surface toward the second surface. The electronic package includes a first conducting layer having a length and a width extending laterally in two dimensions across a major part of the first surface of the carrier substrate. The anchor vias have plural attachments along the length and the width of the first conducting layer to secure the first conducting layer to the carrier substrate.
Claims17
A method for forming an electronic package, comprising:
- providing a carrier substrate having first and second surfaces;
- forming in the carrier substrate a plurality of vias extending from the first surface;
- forming a first conducting layer having a length and a width extending laterally in two dimensions across a major part of the first surface of the carrier substrate;
- and
- depositing at least one via material into the vias to connect the plural via materials to the first conducting layer and secure the first conducting layer to the carrier substrate, wherein a void inside the vias remains unfilled by the via materials.
A method for forming an electronic package, comprising:
- providing a carrier substrate having first and second surfaces;
- forming in the carrier substrate a plurality of vias extending from the first surface;
- forming a first conducting layer having a length and a width extending laterally in two dimensions across a major part of the first surface of the carrier substrate;
- depositing at least one via material into the vias to connect the plural via materials to the first conducting layer and secure the first conducting layer to the carrier substrate;
- and
- depositing a dielectric layer between the carrier substrate and the first conducting layer.
A method for reducing thermal fatigue failure due to heat cycling in an electronic package, comprising:
- thermal cycling a conducting layer on a carrier substrate that extends laterally in two dimensions across a major part of a surface of the carrier substrate;
- and
- securing the conducting layer to the carrier substrate by plural via materials disposed in plural vias, extending into the carrier substrate, and connecting the conducing layer to the carrier substrate at multiple attachments along the two dimensions.
Dependencies are inferred from the claim text.