Method of fabricating an integrated circuit having a multi-layer structure with a seal ring

A manufacturing method for a semiconductor wafer on which a plurality of IC regions partitioned by scribing regions are formed to realize ICs having multilayer structures, and a plurality of seal rings are formed in peripheral areas of the ICs, said manufacturing method comprising the steps of:

• forming an uppermost wiring layer together with a continuous metal layer, which is formed in the seal ring;
• forming a planar insulating layer to cover the IC region, the continuous metal layer, and the scribing region;
• selectively removing a prescribed region of the planar insulating layer above the continuous metal layer;
• and
• forming a passivation film to cover the planar insulating layer and the metal layer,
• wherein the continuous metal layer formed in the seal ring includes a plurality of levels and extends into the planar insulating layer and towards each of the IC region and the scribing region.

A manufacturing method for a semiconductor device in which a thin-film element is formed on a wiring layer of an IC region formed on a semiconductor substrate via a plurality of insulating layers, said manufacturing method comprising:

• forming a first insulating layer;
• forming a first resist film having a first resist opening whose wall is slanted and gradually expanded from a bottom to an upper end thereof;
• selectively removing the first insulating layer by using the first resist film as a mask, thus forming a first opening in the first insulating layer that exposes a part of the wiring layer, wherein the first opening is slanted and gradually expanded from a bottom to an upper end thereof;
• forming a second insulating layer that covers the first insulating layer and the first opening;
• forming a second resist film having a second resist opening;
• selectively removing the second insulating layer by using the second resist film as a mask, thus forming a second opening in the second insulating layer that exposes a portion of the part of the wiring layer, wherein the second opening is slanted and gradually expanded from a bottom to an upper end thereof, said second opening being smaller than the first opening;
• and
• forming a secondary wiring layer in the second opening of the second insulating layer so as to establish an electric connection between the wiring layer and the thin-film element.

A manufacturing method for a semiconductor device having a thin-film element, the method comprising:

• forming a wiring layer of an IC region formed on a semiconductor substrate;
• forming an insulating layer on the wiring layer;
• forming a first opening and a second opening in the insulating layer to partially expose the wiring layer at different positions;
• wherein the wiring layer is partially exposed in the first opening for establishing an electric connection between the wiring layer and the thin-film element so as to form a thin-film element section, and
• wherein the wiring layer is partially exposed in the second opening so as to form an external-terminal connection pad, which is separated from the thin-film element section,
• wherein the first opening is formed by removing the insulating layer covering the wiring layer with respect to the thin-film element section;
• then, the second opening is formed by removing the insulating layer covering the wiring layer with respect to the external-terminal connection pad.