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US 8,007,727 B2Granted
Virtual semiconductor nanowire, and methods of using same
AssigneeIntel Corporation
InventorsGil Shalev, Amihood Doron, Ariel Cohen
Life of this patent
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Abstract
A multiple-gate field-effect transistor includes a fluid in a top gate, two lateral gates, and a bottom gate. The multiple-gate field-effect transistor also includes a patterned depletion zone and a virtual depletion zone that has a lesser width than the patterned depletion zone. The virtual depletion zone width creates a virtual semiconductor nanowire that is lesser in width than the patterned depletion zone.
Claims17
An apparatus comprising:
- a multiple-gate field-effect transistor including a first lateral gate and a second lateral gate disposed on opposite sides of a semiconductive well;
- a top gate and a bottom gate disposed respectively above and below the semiconductive well, wherein the top gate is configured to receive an electrically conductive fluid that contains a biological product;
- a patterned depletion zone between the first and second lateral gates, wherein the patterned depletion zone includes a first width;
- and
- a virtual depletion zone imposed in the semiconductive well, wherein the virtual depletion zone includes a second width that is less than the first width.
2 more elements
An apparatus comprising:
- a multiple-gate field-effect transistor including a first lateral gate and a second lateral gate disposed on opposite sides of a semiconductive well, wherein each of the respective first- and second lateral gates are connected to a lateral implant terminal;
- a top gate and a bottom gate disposed respectively above and below the semiconductive well, wherein the top gate is configured to include an electrically conductive fluid that contains a biological product;
- a patterned depletion zone between the first and second lateral gates, wherein the patterned depletion zone includes a first width;
- a multiple-gate field-effect transistor source region and source electrode disposed near one part of the semiconductive well;
- a multiple-gate field-effect transistor drain region and drain electrode disposed opposite the source region and source electrode;
- a capture molecule disposed on a gate dielectric of the bottom gate;
- and
- a virtual depletion zone imposed in the semiconductive well, wherein the virtual depletion zone includes a second width that is less than the first width.
5 more elements
An apparatus comprising:
- a multiple-gate field-effect transistor including a first lateral gate and a second lateral gate disposed on opposite sides of a semiconductive well;
- a top gate and a bottom gate disposed respectively above and below the semiconductive well, wherein the top gate is configured to receive an electrically conductive fluid that contains a biological product;
- a patterned depletion zone between the first and second lateral gates, wherein the patterned depletion zone includes a first width, wherein the patterned depletion zone is in a width range from about 2 nm to about 250 nm;
- a virtual depletion zone imposed in the semiconductive well, wherein the virtual depletion zone includes a second width that is less than the first width, wherein the virtual depletion zone is non-symmetrically vertically imposed within the semiconductive well, wherein the virtual depletion zone has an eccentric shape;
- a multiple-gate field-effect transistor source region and source electrode disposed near one part of the semiconductive well;
- and
- a multiple-gate field-effect transistor drain region and drain electrode disposed opposite the source region and source electrode.
4 more elements
Dependencies are inferred from the claim text.