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US 8,000,161 B2Granted
Method and system for encoding to eliminate parasitics in crossbar array memories
AssigneeUniversity of Virginia Patent Foundation
InventorsMircea R. Stan, Adam C. Cabe
Life of this patent
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Abstract
A method of encoding data stored in a crossbar memory array, such as a nanowire crossbar memory array, to enable significant increases in memory size, modifies data words to have equal numbers of ‘1’ bits and ‘0’ bits, and stores the modified words together with information enabling the original data to be retrieved upon being read out from memory.
Claims19
An electronic data storage device comprising:
- a memory;
- an input device coupled to said memory for receiving an original multi-bit word having a first length;
- a counter that counts bits of a first value of said multi-bit word;
- a comparator that compares said counted bits of said first value with half of said first length and outputs a comparison value indicating whether there are an equal number of bits of each of two values in said multi-bit word;
- a bit-flipper that generates an encoded word by changing bit values of said multi-bit word so as to equalize the quantity of bits of each value in said multi-bit word, and writing said encoded word to said memory;
- wherein said encoded word includes information to decode said encoded word to said original multi-bit word when read from said memory.
3 more elements
A method of storing a multi-bit data word in an electronic memory, comprising:
- receiving an original multi-bit data word having a first length, wherein each bit of said multi-bit data word is one of a first value or a second value;
- counting the number of bits in said original multi-bit data word having said first value;
- comparing said counted number with half of said first length, and outputting a comparison value indicating whether there are an equal number of bits of each of said first and second values in said original multi-bit word;
- changing selected bit values in said original multi-bit word to form a modified word having equal numbers of bits of said first and second values;
- providing information to return said modified word to said original multi-bit word;
- and
- storing said modified word and said information in said memory.
4 more elements
An encoder stage for generating an encoded word from an original multi-bit word, comprising:
- a counter for counting the number of ‘1’ bits in said original multi-bit word inputted to a data path of said encoder;
- a comparator for comparing the counted number of ‘1’s with half of the length of said original multi-bit word;
- a circuit for outputting an inverted value of a selected bit of said original multi-bit word if a result of said comparison is false, and for outputting a non-inverted value of said selected bit if said comparison result is true;
- and
- an up/down counter that increments said count when an inverted value is a ‘1’ bit and decrements said count when an inverted value is a ‘0’ bit.
2 more elements
Dependencies are inferred from the claim text.