Interference reduction device

An interference reduction device comprising:

• an analog to digital converter (A/D converter:
• ADC) to perform A/D conversion on input analog signal at frequency M (M is an integer of 3 or more) times as high as output frequency;
• a serial to parallel converter (S/P converter) to repeatedly perform a session of distribution processing in which a digital signal obtained by the A/D conversion is distributed on a symbol basis to M destinations in a predetermined order;
• a digital filter to receive the signal distributed at the first timing in each session of the distribution processing and to output the signal after a filter operation at the output frequency;
• (M−1) interpolation filters each to receive the signal other than the signal distributed at the first timing in each session of the distribution processing, to perform a filter operation, also to perform interpolation processing to thereby generate the signal distributed to the digital filter in the distribution processing, and to output the generated signal at the output frequency;
• a sampling unit to sample the inputted digital signal at frequency M times as high as the output frequency;
• a decision unit to decide which one of the digital filter and the (M−1) interpolation filters has the smallest influence of interference of the input digital signal, on the basis of a sampling result by the sampling unit;
• and
• a selector to output one of the signals outputted by the digital filter and the (M−1) interpolation filters, on the basis of a decision result of the decision unit.

An interference reduction device comprising:

• an analog to digital converter (A/D converter:
• ADC) to perform A/D conversion on input analog signal at frequency M (M is an integer of 3 or more) times as high as output frequency;
• a serial to parallel converter (S/P converter) to repeatedly perform a session of distribution processing in which a digital signal obtained by the A/D conversion is distributed on a symbol basis to M destinations in a predetermined order;
• a buffer to receive the signal distributed at the first timing in each session of the distribution processing and to output the symbols in a first-in first-out order;
• (M−1) interpolation filters each to receive the signal other than the signal distributed at the first timing in each session of the distribution processing, to perform a filter operation, also to perform interpolation processing to thereby generate the signal distributed to the buffer in the distribution processing, and to output the generated signal at the output frequency;
• a sampling unit to sample the inputted digital signal at frequency M times as high as the output frequency;
• a decision unit to decide which one of the buffer and the (M−1) interpolation filters has received the smallest influence of interference of the input digital signal, on the basis of a sampling result by the sampling unit;
• and
• a selector to output one of the signals outputted by the buffer and the (M−1) interpolation filters, on the basis of a decision result of the decision unit.