Semiconductor device packages with electromagnetic interference shielding

A semiconductor device package, comprising:

• a substrate unit including
• a first surface,
• a second opposing surface,
• an electrically conductive layer disposed between the first surface and the second opposing surface of the substrate unit, and
• a grounding element extending between the electrically conductive layer and the second opposing surface of the substrate unit, the grounding element including a first end, a second end, and a lateral surface, the first end disposed between the first surface and the second opposing surface of the substrate unit and being spaced apart from the first surface of the substrate unit, the second end disposed adjacent to the second opposing surface of the substrate unit, the lateral surface disposed adjacent to a periphery of the substrate unit;
• a semiconductor device disposed adjacent to the first surface of the substrate unit and electrically connected to the substrate unit;
• a package body disposed adjacent to the first surface of the substrate unit and covering the semiconductor device, the package body including exterior surfaces;
• and
• an electromagnetic interference shield disposed adjacent to the exterior surfaces of the package body and electrically connected to the lateral surface of the grounding element,
• wherein the grounding element includes a first via pad remnant, a second via pad remnant, and a plated channel remnant extending between the first via pad remnant and the second via pad remnant,
• wherein the first via pad remnant is disposed adjacent to the electrically conductive layer of the substrate unit, and the second via pad remnant is disposed adjacent to the second opposing surface of the substrate unit.

A method of forming a semiconductor device package, comprising:

• providing a substrate including an upper surface, a lower surface, and grounding vias partially extending between the upper surface and the lower surface of the substrate, such that a height of each of the grounding vias is less than a thickness of the substrate;
• electrically connecting a semiconductor device to the upper surface of the substrate;
• applying a molding material to the upper surface of the substrate to form a molded structure covering the semiconductor device;
• forming cutting slits fully extending through the molded structure and the substrate, the cutting slits being aligned with the substrate, such that:
• (a) the substrate is sub-divided to form a separated substrate unit;
• (b) the molded structure is sub-divided to form a separated package body disposed adjacent to the substrate unit, the package body including exterior surfaces;
• and (c) remnants of the grounding vias correspond to grounding elements disposed adjacent to a periphery of the substrate unit, each of the grounding elements including an exposed connection surface;
• and
• subsequent to forming the cutting slits, applying an electromagnetic interference coating to the exterior surfaces of the package body and the connection surfaces of the grounding elements to form an electromagnetic interference shield.