Feedback network for cascaded amplifiers
OwnerEsa Tiiliharjuinventor
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Abstract
The invention relates to a feedback network (60) for cascade amplifiers (200), which comprises an active stage (30) to feed signal back to a first internal node (65) at the output of the first amplifier stage (61) of the cascade. The invention further relates to a feedback network (60) which comprises said active feedback stage (30) with said first internal amplifier node (65) connection and a feedback resistor (10) connected from said cascade amplifier output port (out) to its input port (in).
Claims16
A feedback network (60) for a multistage amplifier, comprising:
- two or more amplifier stages connected in cascade;
- wherein a feedback amplifier stage (30) is connected from circuit output to its first internal node (65) at the output of the first amplifier stage (61) of the cascade;
- wherein said feedback network (60) comprises a feedback resistor (10) connected from cascade amplifier output port to said cascade amplifier input port, and a feedback amplifier stage (30) connected from circuit output to its first internal node (6) at the output of the first amplifier stage of the cascade (61);
- further comprising a feedback resistor (10) connected from the cascade amplifier output port to said amplifier input port, and a feedback amplifier stage (30) connected from said amplifier output to its first internal node (6) at the output 3 of the first amplifier stage of the cascade (61), characterized in that said feedback amplifier stage (30) comprises a PMOS transistor which mirrors output stage signaling and biasing current as a feedback signal through sensing it with its gate node and is delivering its feedback signaling through its drain node directly connected to said first internal node (6);
- said cascade amplifier comprises three copies of schematically similar biased CMOS amplifier stages (61, 62, 63) which can have different element values each according to desired performance;
- and wherein said schematically similar biased CMOS amplifier stages have a first NMOS input transistor which is loaded with a PMOS input transistor so as to form current reuse amplifying stages.
A feedback network (60) for a multistage amplifier, where the amplifier consists of two or more amplifier stages connected in cascade, characterized in that a feedback amplifier stage (30) is connected from circuit output to its first internal node (65) at the output of the first amplifier stage (61) of the cascade;
- wherein said feedback network (60) comprises a feedback resistor (10) connected from the cascade amplifier output port to said cascade amplifier input port, and a feedback amplifier stage (30) connected from circuit output to its first internal node (6) at the output of the first amplifier stage of the cascade (61);
- wherein said cascade amplifying stages (61, 62, 63) are dc-connected to mirror first stage biasing and signaling current so that the arrangement is characterized in that said cascade second amplifying stage (62) is dc-connected at its PMOS transistor (34) input gate so that its NMOS input transistor (33) load is biased and linearized with a local feedback resistor (14);
- said second stage NMOS input transistor (33) gate is driven with input signaling through a dc-blocking capacitor (22);
- said cascade third amplifying stage (63) is dc-connected at its NMOS transistor (3) input gate so that its PMOS input transistor (36) load is biased and linearized with a local feedback resistor (16);
- and said third stage PMOS input transistor (36) gate is driven with input signaling through a dc-blocking capacitor (25).
Dependencies are inferred from the claim text.