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US 7,972,909 B2Granted
Guard ring extension to prevent reliability failures
AssigneeIntel Corporation
InventorsNicole Meier Chang, George J. Korsh, Shafqat Ahmed, John Nugent, Ed Nabighian
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Abstract
An embodiment of the present invention is a technique to prevent reliability failures in semiconductor devices. A trench is patterned in a polyimide layer over a guard ring having a top metal layer. A passivation layer is etched at bottom of the trench. A capping layer is deposited on the trench over the etched passivation layer. The capping layer and the top metal layer form a mechanical strong interface to prevent a crack propagation.
Claims1
A method comprising:
- patterning a passivation layer on top of a guard ring;
- depositing a first polyimide layer on the passivation layer to cover the passivation layer such that an edge of the passivation layer is not exposed;
- etching vertically through at least an interlayer dielectric (ILD) layer and/or a nitride layer to form a hole;
- depositing a sidewall with nitride on a vertical wall of the hole;
- and
- filling the hole with a second polyimide layer.
3 more elements
Dependencies are inferred from the claim text.