Finite impulse response filter and digital signal receiving apparatus

A finite impulse response filter to which a digital signal obtained by performing sampling on an analog signal at a rate of M times of a symbol rate where M is an even number of two or more, is input, and which has characteristics of even taps, comprising:

• a plurality of tap-coefficient multipliers, each of the tap-coefficient multipliers multiplying the digital signal with a tap coefficient;
• a plurality of adders, each of which correspond to one of the plurality of tap-coefficient multipliers, one of the adders adding an output of a corresponding one of the tap-coefficient multipliers to an output of one of a first plurality of delay elements or a value of zero, another one of the adders adding an output of a corresponding one of the tap-coefficient multipliers to an output of one of a second plurality of delay elements or a value of zero, and each of the remaining plurality of adders adding an output of a corresponding one of the tap-coefficient multipliers to one of the first plurality of delay elements or one of the second plurality of delay elements;
• and
• a switcher that inputs to the plurality of adders of signals delayed by the first plurality of delay elements, signals delayed by the second plurality of delay elements, or a value of zero,
• wherein the first plurality of delay elements delay one of two sets of the addition results output from the plurality of adders to input to an adjacent adder, and the second plurality of delay elements delay the other set of the two sets of the addition results output from the plurality of adders in a direction opposite to a direction in the first plurality of delay elements to input to an adjacent adder.