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US 7,945,825 B2Granted
Recovery while programming non-volatile memory (NVM)
AssigneeSpansion Isreal, Ltd
InventorsItzic Cohen, Ori Tirosh, Kobi Danon, Shmulik Hadas
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Abstract
Disclosed are methods and circuits for performing recovery associated with programming of non-volatile memory (NVM) array cells. According to embodiments, there are provided methods and circuits for programming NVM cells, including: (1) erasing NVM array cells; (2) loading an SRAM with user data; (3) if programming is successful, then flipping bits in the SRAM; and (4) if programming is not successful, reading data back from the array to the SRAM.
Claims12
A method of programming a set of erased non-volatile memory (NVM) cells comprising:
- loading data to be programmed to the NVM cells onto a first set of Static Random Memory (SRAM) bits, wherein each of one or more SRAM bits corresponds to an NVM cell;
- flipping each of the one or more SRAM bits corresponding to a given NVM cell once the given NVM cell has been program verified;
- copying data back from each of the program verified NVM cells to respective corresponding one or more SRAM bits of the first set in the event an NVM cell cannot be program verified, wherein copying data back includes reading the NVM cells using a first read reference level;
- and
- performing error detection on the bits of the SRAM once copying has been completed.
2 more elements
A non-volatile memory (NVM) device comprising:
- a set of non-volatile memory (NVM) cells;
- control logic adapted to:
- (1) load data to be programmed to the NVM cells onto a first set of Static Random Memory (SRAM) bits, wherein each of one or more SRAM bits corresponds to an NVM cell;
- (2) flip each of the one or more SRAM bits corresponding to a given NVM cell once the given NVM cell has been program verified;
- (3) copy data back from each of the program verified NVM cells to respective corresponding one or more SRAM bits of the first set in the event an NVM cell cannot be program verified, wherein copying data back includes reading the NVM cells using a first read reference level;
- and (4) performing error detection on the bits of the SRAM once copying has been completed.
3 more elements
Dependencies are inferred from the claim text.