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US 7,926,013 B2Granted
Validating continuous signal phase matching in high-speed nets routed as differential pairs
AssigneeIntel Corporation
InventorsHoward L. Elikan, Andrew McRonald, Dennis Miller
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Abstract
Methods and apparatus to validate continuous signal phase matching in high-speed nets routed as differential pairs are described. In one embodiment, a primary net of a differential pair may be traversed to determine whether a design rule violation has occurred based on comparison of calculated trace lengths of the primary net and a secondary net against a threshold value. Other embodiments are also described.
Claims15
A method comprising:
- traversing a first net of a differential pair from a starting point by a trace segment size value;
- at each trace segment intermediate point determined based on the trace segment size value:
- summing one or more trace lengths of each segment of the first net from the starting point to an intermediate point to determine a first sum;
- determining a point on a second net of the differential pair that is near the intermediate point;
- and
- summing one or more trace lengths of each segment of the second net from the starting point to the determined point on the second net to determine a second sum;
- and
- generating a signal, at an integrated circuit of a processor, to indicate status of a design rule violation based on a comparison of first sum and second sum against a first threshold value.
5 more elements
A non-transitory computer storage readable medium comprising one or more instructions that when executed on a processor configure the processor to:
- traverse a primary net of a differential pair from a starting point by a trace segment size value;
- at each trace segment intermediate point determined based on the trace segment size value:
- sum one or more trace lengths of each segment of the primary net from the starting point to an intermediate point to determine a first sum;
- determine a point on a secondary net of the differential pair that is near the intermediate point;
- and
- sum one or more trace lengths of each segment of the secondary net from the starting point to the determined point on the secondary net to determine a second sum;
- and
- indicate, at an integrated circuit of the processor status of a design rule violation based on a comparison of first sum and second sum against a first threshold value.
5 more elements
Dependencies are inferred from the claim text.