Simulator for determining data loss in a fault tolerant system
AssigneeHewlett-Packard Development Company, L.P.
InventorsJohn Johnson Wylie, Kevin M. Greenan
Life of this patent
Estimating the term…
Abstract
A fault tolerant system is simulated to determine the occurrence of data loss in the fault tolerant system. A list of erasure patterns corresponding to an erasure code implemented across the devices in the system is provided and a device event is simulated. The list of erasure patterns is updated based on the device event, and the occurrence of data loss is determined based on the updated list.
Claims21
A method of simulating a fault tolerant system to determine occurrence of a data loss, comprising:
- providing a list of erasure patterns corresponding to an erasure code implemented across a plurality of devices in a fault tolerant system;
- simulating a device event in the fault tolerant system;
- updating the list of erasure patterns based on the device event;
- and
- determining occurrence of a data loss in the fault tolerant system based on the updated list of erasure patterns.
A method of simulating a storage system to determine occurrence of a data loss in the fault tolerant system, comprising:
- providing a list of minimal erasures corresponding to an erasure code having a plurality of symbols implemented across a plurality of storage devices in a storage system;
- providing failure models corresponding to the storage devices;
- creating a bookkeeping minimal erasures list (MEL) based on the list of minimal erasures, the bookkeeping MEL comprising a plurality of entries corresponding to the minimal erasures;
- simulating a plurality of device events based on the failure models that result in a risk of data loss;
- updating the bookkeeping MEL based on the simulated device events;
- and
- determining occurrence of a data loss from the storage system based on the updated bookkeeping MEL.
An article comprising a computer-accessible storage medium containing instructions that when executed by a processor-based system cause the processor-based system to:
- generate a list of minimal erasures corresponding to an erasure code having a plurality of symbols;
- simulate device events in a storage system comprising a plurality of storage devices, wherein the plurality of symbols is implemented across the storage devices;
- track a number of symbols lost as a result of the device events;
- update the list of minimal erasures when the number of lost symbols reaches or exceeds a predefined threshold;
- and
- determine occurrence of a data loss from the storage system based on the updated list.
A method of simulating a fault tolerant system to determine occurrence of a data loss, comprising:
- providing a list of erasure patterns corresponding to an erasure code implemented across a plurality of devices in a fault tolerant system;
- providing failure models corresponding to the devices in the fault tolerant system;
- simulating device events based on the failure models;
- updating the list of erasure patterns when a number of device events resulting in a risk of data loss reaches or exceeds a Hamming distance of the erasure code;
- and
- determining occurrence of a data loss in the fault tolerant system based on the updated list of erasure patterns.
A method of simulating a fault tolerant system to determine occurrence of a data loss, comprising:
- providing a list of minimal erasure patterns corresponding to an erasure code implemented across a plurality of devices in a fault tolerant system;
- simulating a device event in the fault tolerant system;
- updating the list of minimal erasure patterns based on the device event;
- and
- determining occurrence of a data loss in the fault tolerant system based on the updated list of minimal erasure patterns.
Dependencies are inferred from the claim text.