US 7,925,825 B2 · System to support a full asynchronous interface within a memory hub device

Abstract

A memory system is provided that implements an asynchronous boundary in a memory module. The memory system comprises a memory hub device integrated in a memory module. The memory system also comprises a set of memory devices coupled to the memory hub device. The memory hub device comprises a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency. The memory system further comprises a memory hub controller integrated in the memory hub device. The memory hub controller reads the memory access command from the command queue at a second operating frequency. By receiving the memory access command at the first operating frequency and reading the memory access command at the second operating frequency an asynchronous boundary is implemented within the memory hub device of the memory module.

Claims20

Dependent claims

A memory system, comprising:

a memory hub device integrated in a memory module;
a set of memory devices coupled to the memory hub device, wherein the memory hub device comprises a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency;
and
a memory hub controller integrated in the memory hub device, wherein the memory hub controller reads the memory access command for the set of memory devices from the command queue at a second operating frequency, and wherein receiving the memory access command at the first operating frequency and reading the memory access command at the second operating frequency implements an asynchronous boundary within the memory hub device of the memory module.

1 more element

A data processing system, comprising:

a processor;
and
a memory coupled to the processor, wherein the memory comprises one or more memory modules, each memory module comprising:
a memory hub device integrated in the memory module;
a set of memory devices coupled to the memory hub device, wherein the memory hub device comprises a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency;
and
a memory hub controller integrated in the memory hub device, wherein the memory hub controller reads the memory access command for the set of memory devices from the command queue at a second operating frequency, and wherein receiving the memory access command at the first operating frequency and reading the memory access command at the second operating frequency implements an asynchronous boundary within the memory hub device of the memory module.

4 more elements

Dependencies are inferred from the claim text.

System to support a full asynchronous interface within a memory hub device

Life of this patent

System to support a full asynchronous interface within a memory hub device

Life of this patent

Abstract

Claims20