Dynamic microcode for non-volatile memory

A method of interfacing a host device with non-volatile memory, comprising:

• querying a non-volatile memory;
• receiving information pertaining to at least one characteristic of the non-volatile memory responsive to the querying;
• employing a controller schema to determine compatibility of the non-volatile memory with a set of different onboard memory control modules based in part on the at least one characteristic, the different onboard memory control modules each being configured to implement instructions that manage raw cell blocks of the non-volatile memory;
• selecting at least one onboard memory control module based on a correlation between the at least one characteristic of the non-volatile memory and the at least one onboard memory control module;
• and
• providing the selected at least one onboard memory control module to the non-volatile memory, wherein the at least one onboard memory control module selected provides the host device with a different interface to the non-volatile memory than a default interface, the different interface providing a different level of abstraction between the host device and the non-volatile memory than the default interface.

A system comprising:

• a host processing device including a processor configured with executable instructions to obtain data from a non-volatile memory, the data indicating a transaction level characteristic of the non-volatile memory;
• a reference component that cross-references the transaction level characteristic with a controller schema and selects a memory control module suitable for the non-volatile memory, the controller schema correlating a plurality of different memory control modules with a plurality of memory transaction level characteristics, the different memory control modules each being configured to implement an abstract interface that manages memory operations and data stored at the non-volatile memory;
• an interface component that downloads selected memory control modules to the non-volatile memory;
• and
• an arbitration component that selects between a first memory control module and a second memory control module based at least on a characteristic of an application executing at the host processing device and the transaction level characteristic of the non-volatile memory, the first memory control module or the second memory control module providing a non-default level of abstraction.