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US 7,925,687 B2Granted
Reporting a saturated counter value
AssigneeTexas Instruments Incorporated
InventorsManisha Agarwala, John M. Johnsen, Lewis Nardini
Life of this patent
Estimating the term…
Abstract
A saturating count counts received event signals up to a first predetermined number. An overflow counter counts overflows up to a second predetermined number. The counter indicates overflow when the overflow count is non-zero and saturates and stops counting at a maximum count when the overflow count reaches the second predetermined number. The counter can be read via a register read operation. The sum of the sum of the first predetermined number of bits and the second predetermined number of bits being an integral multiple of 8 bits.
Claims4
A method of saturate counting comprising:
- counting received event signals up to a first predetermined number in an event counter;
- counting overflow of event counts of the first predetermined number up to a second predetermined number of overflows in an overflow event counter;
- logically ORing in an OR gate all bits of an overflow event count in said overflow event counter thereby producing an overflow signal indicating overflow when the overflow count is non-zero;
- and
- blocking supply of the received event signal to said event counter thereby stopping the event count at the first predetermined number upon count of the second predetermined number of overflows.
2 more elements
Dependencies are inferred from the claim text.