Linear transformation circuit
AssigneeRambus Inc.
InventorsAliazam Abbasfar, Amir Amirkhany, Vladimir Stojanovic, Mark A. Horowitz
Life of this patent
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Abstract
A first device is described. The first device may include a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit may have an input to receive a vector having N digital values and an output to output N first output signals, a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H, and a conversion (DAC) circuit coupled to the sign-adjustment circuit. Outputs from the DAC circuit may be summed to produce an output.
Claims21
A device, comprising:
- a linear transformation circuit to implement multiplication by a matrix D, the linear transformation circuit having an input to receive a vector having N digital values and an output to output N first output signals;
- a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H;
- and
- a digital-to-analog-conversion (DAC) circuit coupled to the sign-adjustment circuit, wherein outputs from the DAC circuit are summed to produce an output.
A device, comprising:
- a linear transformation circuit to implement multiplication by a matrix D, the linear transformation circuit having an input to receive a vector having N digital values and an output to output N first output signals;
- and
- an output circuit coupled to the linear transformation circuit, wherein the output circuit implements digital-to-analog-conversion (DAC) on a subset including at least M of the N first output signals in accordance with a set of coefficients H and adjusts signs of the subset in accordance with the set of coefficients H, and wherein outputs from the output circuit are summed to produce an output.
A method, comprising:
- performing a linear transformation on a vector having N digital values, wherein the linear transformation corresponds to multiplication by a matrix D;
- selecting a subset of outputs from the linear transformation in accordance with a set of coefficients H;
- modifying signs of the selected subset in accordance with the set of coefficients H;
- performing digital-to-analog conversion (DAC) on outputs from the modifying;
- and
- summing outputs from the DAC to produce an output.
A device, comprising:
- a first means for implementing multiplication by a matrix D, the first means having an input to receive a vector having N digital values and an output to output N first output signals;
- a second means for selecting a subset of the N first output signals in accordance with a set of coefficients H;
- a third means for adjusting signs of the selected first output signals in accordance with the set of coefficients H;
- and
- a digital-to-analog-conversion (DAC) circuit coupled to the third means, wherein outputs from the DAC circuit are summed to produce an output.
A computer readable medium containing data representing a circuit that includes:
- a device, comprising:
- a linear transformation circuit to implement multiplication by a matrix D, the linear transformation circuit having an input to receive a vector having N digital values and an output to output N first output signals;
- an output-selection circuit to select a subset of the N first output signals in accordance with a set of coefficients H;
- a sign-adjustment circuit to adjust signs of the selected first output signals in accordance with the set of coefficients H;
- and
- a digital-to-analog-conversion (DAC) circuit coupled to the sign-adjustment circuit, wherein outputs from the DAC circuit are summed to produce an output.
Dependencies are inferred from the claim text.