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US 7,925,013 B1Granted
System for data encryption and decryption of digital data entering and leaving memory
AssigneeConexant Systems, Inc.
InventorWinefred Washington
Life of this patent
Estimating the term…
Abstract
A system is described for encryption and decryption of digital data prior to the digital data entering the memory of a digital device by generating a key, sub-key and combining the sub-key with mixed digital data, where the encryption and decryption occurs between the memory controller and the input output register.
Claims26
A system of digital data encryption in a digital device, comprising:
- generating an inaccurate clock signal that oscillates at different frequencies;
- an integrated encryption key generator generating a plurality of encryption keys based upon the input received from an inaccurate timing source;
- and based on the generated clock signal and a pseudorandom bit pattern generated in a linear feedback shift register each time the digital device is reset;
- a data buffer;
- an input/output register that interfaces with memory of the digital device;
- a control pad coupled to the input/output register;
- and a memory controller that directs digital data from the memory to the data buffer with the digital data passing through the encryption key generator prior to entering the input/output register, wherein the integrated encryption key generator is coupled between the data buffer and the input/output register, and the integrated encryption key generator, the data buffer, the input/output register, the control pad and the memory controller are formed on a single substrate and are accessed through the control pad.
4 more elements
A system configured to decrypt encrypted digital data stored in memory of a digital device, comprising:
- generating an inaccurate clock signal that oscillates at different frequencies;
- an encryption key generator receiving a signal from an inaccurate clock and generating a plurality of keys based on the generated clock signal and a pseudorandom bit pattern generated in a linear feedback shift register each time the digital device is reset;
- and for encrypting the encrypted digital data when the digital device is reset;
- a memory controller that generates a memory request to retrieve the encrypted digital data;
- and
- an encryption circuit that decrypts the encrypted digital data in response to the memory request of the memory controller using one or more of the plurality of keys.
3 more elements
A method of digital data encryption in a digital device, comprising:
- generating an inaccurate clock signal that oscillates at different frequencies;
- generating a plurality of keys based on input received from an inaccurate clock, and based on the generated clock signal and a pseudorandom bit pattern generated in a linear feedback shift register each time the digital device is cycled;
- storing the plurality of keys;
- placing the digital data in a data buffer;
- and encrypting the digital data using the at least one of the plurality of keys while the digital data is being placed in a rewritable memory.
2 more elements
A method to decrypt encrypted digital data stored in memory of a digital device, comprising:
- generating an inaccurate clock signal that oscillates at different frequencies;
- generating a plurality of keys based on input received from an inaccurate clock, and based on generated clock signal and a pseudorandom bit pattern generated in a linear feedback shift register each time the digital device is cycled;
- generating a memory request to retrieve the encrypted digital data;
- and decrypting the encrypted digital data using one of the plurality of keys.
1 more element
A set-top box apparatus in receipt of digital data for storage in a rewritable memory, comprising:
- generating an inaccurate clock signal that oscillates at different frequencies;
- an apparatus generating a plurality of keys based on the generated clock signal and a pseudorandom bit pattern generated in a linear feedback shift register each time the apparatus is reset;
- a data buffer filled with the digital data;
- and a memory controller that directs the storage of the digital data in the rewritable memory with the digital data being encrypted by the encryption circuit and the at least one key after the digital data has entered the data buffer but prior to being stored in the rewritable memory.
1 more element
Dependencies are inferred from the claim text.