US 7,924,960 B1 · Input/output data rate synchronization using first in first out data buffers

Abstract

A system includes a first buffer configured to receive data at a first rate, and output the data at a second rate. A processing module configured to receive the data from the first buffer at the second rate, convert the data into processed data, and output the processed data at a third rate. A second buffer is configured to receive the processed data from the processing module at the third rate, and output the processed data at a fourth rate. The third rate is faster than the fourth rate to avoid a buffer underflow condition in the second buffer. In response to the second buffer reaching a predetermined capacity, the processing module is further configured to enter into a break state in which the processing module temporarily stops both receiving data from the first buffer and outputting the processed data and adjusts the second rate to avoid a buffer overrun condition in the first buffer.

Claims15

Dependent claims

A system comprising:

a first buffer configured to receive data at a first rate, and output the data at a second rate;
a processing module configured to receive the data from the first buffer at the second rate, convert the data into processed data, and output the processed data at a third rate;
and
a second buffer configured to receive the processed data from the processing module at the third rate, and output the processed data at a fourth rate, the third rate being initially faster than the fourth rate to avoid a buffer underflow condition in the second buffer,
wherein in response to the second buffer reaching a predetermined capacity, the processing module is further configured to temporarily stop (i) receiving data from the first buffer and (ii) outputting the processed data to the second buffer, and
wherein in response to the second buffer reaching the predetermined capacity, the processing module is further configured to adjust the second rate to avoid a buffer overrun condition in the first buffer.

3 more elements

A method comprising:

receiving data at a first buffer in accordance with a first rate, and outputting the data from the first buffer in accordance with a second rate;
receiving, at a processing module, the data output from the first buffer in accordance with the second rate, wherein the processing module converts the data into processed data;
outputting the processed data from the processing module in accordance with a third rate;
and
receiving, at a second buffer, the processed data from the processing module in accordance with the third rate, and outputting the processed data from the second buffer in accordance with a fourth rate, the third rate being initially faster than the fourth rate to avoid a buffer underflow condition in the second buffer,
wherein in response to the second buffer reaching a predetermined capacity, the processing module temporarily stops (i) receiving data from the first buffer and (ii) outputting the processed data to the second buffer, and
wherein in response to the second buffer reaching the predetermined capacity, the processing module adjusts the second rate to avoid a buffer overrun condition in the first buffer.

4 more elements

Dependencies are inferred from the claim text.

Input/output data rate synchronization using first in first out data buffers

Life of this patent

Input/output data rate synchronization using first in first out data buffers

Life of this patent

Abstract

Claims15