Method and device for improving clock stability

A device for improving clock stability, comprising:

• a determining unit, configured to determine whether a difference between a current sender timestamp (ST) and a current receiver timestamp (RT) is a mutated value, wherein a mutated value occurs when a value for the difference and an average value for the difference exceed a predetermined range but subsequent values of the difference and the average value for the subsequent values of the difference do not exceed the predetermined range;
• a processing unit, configured to replace difference between the current ST and the current RT with an average difference between ST and the RT if the difference between the current ST and current RT is a mutated value;
• the processing unit comprises:
• a difference replacing subunit, configured to replace the difference between the current ST and the current RT by the average difference between ST and the RT stored in the detecting subunit when the determination result from the determining subunit is that the difference between the current ST and the current RT is a mutated value;
• an average difference subunit, configured to compute an average difference between ST and the RT according to the difference between the current ST and the current RT replaced by the difference replacing subunit and update the average difference between ST and the RT stored in the detecting subunit when the determination result from the determining subunit is that the difference between the current ST and the current RT is a mutated value, or compute an average difference between the current ST and the current RT and update the average difference between the current ST and the current RT stored in the detecting subunit when the determination result from the determining subunit is that the difference between the current ST and the current RT is not a mutated value;
• and
• a service clock acquiring unit, configured to acquire a service clock according to the current ST, the current RT and the average difference between ST and the RT from the processing unit.

A non-transitory computer-readable medium, having computer usable instructions stored thereon for execution by a processor to perform a method for improving clock stability, comprising:

• determining whether a difference between a current sender timestamp (ST) and a current receiver timestamp (RT) is a mutated value, wherein a mutated value occurs when a value for the difference and an average value for the difference exceed a predetermined range but subsequent values of the difference and the average value for the subsequent values of the difference do not exceed the predetermined range;
• replacing the difference between the current ST and the current RT with an average difference between ST and the RT, if the difference between the ST and RT is a mutated value;
• computing a new average difference between ST and the RT according to the replaced difference between the current ST and the current RT;
• and
• acquiring a service clock according to the current ST, the current RT and the new average difference between ST and the RT.