Advanced processor with mechanism for fast packet queuing operations

A method of controlling a flow of packets, the method comprising the steps of:

• receiving a plurality of packets from a networking input;
• placing the plurality of packets in a packet distribution engine (PDE);
• distributing the plurality of packets from the PDE to a packet processing system having a plurality of processor cores;
• receiving processed packets from the packet processing system in a packet ordering mechanism;
• and
• providing the processed packets to a networking output;
• wherein a fast messaging network (FMN) is coupled to the PDE, the packet processing system, the packet ordering mechanism, and the networking output, said FMN also coupled to at least two of the processor cores and configured to link said at least two of the processor cores together such that at least one processor core can send data to another processor core without going through memory.

An advanced processing system, comprising:

• a plurality of processor cores, each processor core being configured to execute multiple threads and to process a plurality of packets, the plurality of packets being received by a networking input, the plurality of packets being further provided to the plurality of processor cores by a packet distribution engine (PDE);
• a packet ordering mechanism configured to receive processed packets from the plurality of processor cores and to provide the processed packets to a networking output;
• and
• a fast messaging network (FMN) coupled to the PDE, said FMN also coupled to at least two of the processor cores and configured to link said at least two of the processor cores together such that at least one processor core can send data to another processor core without going through memory.

An advanced processor, comprising:

• a packet processing system comprising a plurality of processor cores, each processor core configured to execute multiple threads;
• a fast messaging network coupled to the plurality of processor cores;
• a packet distribution engine (PDE) coupled to the fast messaging network, said PDE configured to receive a plurality of packets from a networking input and to distribute the plurality of packets to the packet processing system, the PDE and fast messaging network configured to distribute each packet to a selected thread of one of the plurality of processor cores, wherein the selected thread progresses among the multiple threads, said fast messaging network coupled to at least two of the processor cores and configured to link said at least two of the processor cores together such that at least one processor core can send data to another processor core without going through memory;
• and
• a packet ordering system coupled to the fast messaging network and configured to receive packets from the packet processing system and to provide the processed packets to a networking output.