Fuse monitoring circuit for semiconductor memory device
AssigneeHynix Semiconductor Inc.
InventorsJae-Hyuk Im, Jae-Il Kim
Life of this patent
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Abstract
A fuse monitoring circuit for a semiconductor memory device includes a fuse repair unit including a plurality of fuses each programmed with at least one repair address, configured to receive a fuse reset signal and to output a plurality of fuse state signals each corresponding to a connection state of one of the fuses, a fuse monitoring unit configured to receive a monitoring enable signal and to output a plurality of fuse state monitoring signals each corresponding to a corresponding one of the fuse state signals, each of the fuse state signals corresponding to one of a plurality of addresses, and an output unit configured to receive an output control signal and to output the fuse state monitoring signals to an output pad.
Claims10
A fuse monitoring circuit for a semiconductor memory device, comprising:
- a fuse repair unit including a plurality of fuses each programmed with at least one repair addresses, the fuse repair unit configured to receive a fuse reset signal and to output a plurality of fuse state signals each corresponding to a connection state of one of the fuses;
- a fuse monitoring unit configured to receive a monitoring enable signal and to generate a plurality of fuse state monitoring signals each corresponding to a corresponding one of the fuse state signals, each of the fuse state signals corresponding to one of a plurality of addresses;
- and
- an output unit configured to receive an output control signal and to output the fuse state monitoring signals to an output pad.
Dependencies are inferred from the claim text.