Nonvolatile memory device using resistance material
AssigneeSamsung Electronics Co., Ltd.
InventorsJoon-min Park, Sang-beom Kang, Woo-yeong Cho, Hyung-rok Oh
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Abstract
The present invention provides a nonvolatile memory device that uses a resistance material. The nonvolatile memory device includes: a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction, the stacked memory cell array having at least one memory cell group and at least one redundancy memory cell group; and a repair control circuit coupled to the stacked memory cell array, the repair control circuit configured to repair a defective one of the at least one memory cell group with a selected one of the at least one redundancy memory cell group. The features that enable repair improve the fabrication yield of the nonvolatile memory device.
Claims20
A nonvolatile memory device comprising:
- a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction,
- wherein each one of the plurality of memory cell layers comprises a plurality of memory cell blocks, and
- each one of the plurality of memory cell blocks comprises a plurality of memory cell groups and a plurality of redundancy memory cell group;
- and
- a repair control circuit coupled to the stacked memory cell array and configured to repair within a respective one of the plurality of memory cell blocks of a memory cell layer a defective memory cell group with a selected one of the plurality of redundancy memory cell groups.
A nonvolatile memory device comprising:
- a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction and comprising:
- a first memory cell layer comprising a plurality of memory cell blocks, wherein each one of the plurality of memory cell blocks comprises only a plurality of memory cell groups, the plurality of memory cell groups including a defective memory cell group, and
- a second memory cell layer comprising a plurality of memory cell blocks, wherein each one of the plurality of memory cell blocks includes only a plurality of redundancy memory cell groups;
- and
- a repair control circuit coupled to the stacked memory cell array and configured to repair the defective memory cell group of the first memory cell layer with a selected one of the plurality of redundancy memory cell groups of the second memory cell layer.
A nonvolatile memory device comprising:
- a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction,
- wherein each one of the plurality of memory cell layers comprises a plurality of memory cell blocks,
- one of the plurality of memory cell blocks comprising only a plurality of memory cell groups, the plurality of memory cell groups including a defective memory cell group, and
- another one of the plurality of memory cell blocks comprising only a plurality of redundancy memory cell groups;
- and
- a repair control circuit coupled to the stacked memory cell array and configured to repair the defective memory cell group with a selected one of the plurality of redundancy memory cell groups.
A nonvolatile memory device comprising:
- a stacked memory cell array having a plurality of memory cell layers stacked in a vertical direction and comprising:
- a first memory cell layer comprising a plurality of memory cell blocks, wherein each one of the plurality of memory cell blocks comprises only a plurality of memory cell groups, the plurality of memory cell groups including a defective memory cell group, and
- a second memory cell layer comprising a plurality of memory cell blocks, at least one of the plurality of memory cell blocks being a redundancy memory cell block including only a plurality of redundancy memory cell groups;
- and
- a repair control circuit coupled to the stacked memory cell array and configured to repair the defective memory cell group with a selected one of the plurality of redundancy memory cell groups.
Dependencies are inferred from the claim text.