Implementing boosted wordline voltage in memories
AssigneeInternational Business Machines Corporation
InventorsDerick Gardner Behrends, Todd Alan Christensen, Travis Reynold Hebig, Daniel Mark Nelson
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AssigneeInternational Business Machines Corporation
InventorsDerick Gardner Behrends, Todd Alan Christensen, Travis Reynold Hebig, Daniel Mark Nelson
Estimating the term…
A method and wordline voltage boosting circuit for implementing boosted wordline voltage in memories, and a design structure on which the subject circuit resides are provided. The wordline voltage boosting circuit receives a precharge signal, uses a switching transistor coupled to a bootstrap capacitor, and generates a boosted voltage level responsive to the precharge signal. The boosted voltage level is applied to a voltage supply of an output stage of a wordline driver, causing the wordline voltage level of a selected wordline to be boosted. The switching transistor is controlled by the precharge signal and a node of the bootstrap capacitor supplying the boosted voltage level is driven high by the switching transistor.
A wordline voltage boosting circuit for implementing a boosted wordline voltage in a memory comprising:
A method for implementing a boosted wordline voltage in a memory comprising the steps of:
A design structure embodied in a machine readable medium used in a design process, the design structure comprising:
Dependencies are inferred from the claim text.