Word line voltage boost system and method for non-volatile memory devices and memory devices and processor-based system using same
AssigneeMicron Technology, Inc.
InventorsViolante Moschiano, Giovanni Santin, Ercole di Iorio
Life of this patent
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Abstract
The voltage of a selected word line is increased beyond the voltage to which a respective string driver transistor is capable of driving the word line by capacitively coupling a voltage to the selected word line from adjacent word lines. The voltage is capacitively coupled to the selected word line by increasing the voltages of the adjacent word lines after a programming voltage has been applied to a string driver transistor for the selected word line and after a string driver voltage has been applied to the gates of all of the string driver transistors in an array.
Claims30
A method of applying a programming voltage to a selected word line in a non-volatile memory device, the selected word line being coupled to a string driver transistor, the method comprising:
- applying a first voltage to a gate of the string driver transistor;
- applying a second voltage to a drain of the string driver transistor, the second voltage having a magnitude that is greater than the magnitude of the first voltage;
- and
- after applying the second voltage to the drain of the string driver transistor, driving at least one word line that is adjacent the selected word line from a third voltage to a fourth voltage.
In a flash memory device comprising an array of flash memory cells arranged in rows and columns with the flash memory devices in each row being coupled to a respective word line, each of the word lines being coupled to a source of a respective string driver transistor having a gate and a drain, a method of programming a selected row of memory cells, comprising:
- applying a string driver voltage to the gate of each of the string driver transistor;
- applying a pass voltage to the drain of each of the string driver transistors other than the string driver transistors that are coupled to the selected word line and at least one word line that is adjacent the selected word line, the pass voltage having a magnitude that is substantially smaller than the magnitude of the string driver voltage;
- applying a programming voltage to the drain of the string driver transistor that is coupled to the selected word line, the programming voltage having a magnitude that is greater than the magnitude of the string driver voltage;
- and
- after applying the programming voltage to the drain of the string driver transistor that is coupled to the selected word line, applying a bias voltage to the drain of each string driver transistor that is coupled to the at least one word line that is adjacent the selected word line.
A non-volatile memory device comprising:
- an array of non-volatile memory cells arranged in rows, each row of memory cells being coupled to a respective word line;
- a plurality of string driver transistors having respective sources or drains that are coupled to respective ones of the word lines;
- a voltage supply circuit operable to generate a first voltage, a second voltage having a magnitude that is substantially smaller than the magnitude of the first voltage, a third voltage, and a programming voltage;
- and
- a voltage selector circuit coupled to the voltage supply circuit and the string driver transistors, the voltage selector circuit being operable to program a selected row of memory cells by:
- applying the first voltage to the gate of each of the string driver transistors;
- applying the second voltage to the drain of each of the string driver transistors other than the string driver transistor that is coupled to the selected word line and at least one word line that is adjacent the selected word line;
- applying the programming voltage to the drain of the string driver transistor that is coupled to the selected word line;
- and
- after applying the programming voltage to the source or drain of the string driver transistor that is coupled to the selected word line, applying the third voltage to the source or drain of a respective string driver transistor that is coupled to the at least one word line that is adjacent the selected word line.
A processor-based system comprising:
- a processor operable to process data and to provide memory commands and addresses;
- an input device coupled to the processor;
- an output device coupled to the processor;
- and
- a non-volatile memory device coupled to the processor, the non-volatile memory device comprising:
- an array of non-volatile memory cells arranged in rows, each row of memory cells being coupled to a respective word line;
- a plurality of string driver transistors having respective sources or drains that are coupled to respective ones of the word lines;
- a voltage supply circuit operable to generate a first voltage, a second voltage having a magnitude that is substantially smaller than the magnitude of the first voltage, a third voltage, and a programming voltage;
- and
- a voltage selector circuit coupled to the voltage supply circuit and the string driver transistors, the voltage selector circuit being operable to program a selected row of memory cells by:
- applying the first voltage to the gate of each of the string driver transistors;
- applying the second voltage to the drain of each of the string driver transistors other than the string driver transistor that is coupled to the selected word line and at least one word line that is adjacent the selected word line;
- applying the programming voltage to the drain of the string driver transistor that is coupled to the selected word line;
- and
- after applying the programming voltage to the source or drain of the string driver transistor that is coupled to the selected word line, applying the third voltage to the source or drain of a respective string driver transistor that is coupled to the at least one word line that is adjacent the selected word line.
Dependencies are inferred from the claim text.