Data storage in analog memory cells with protection against programming interruption

A method for data storage, comprising:

• storing first data in analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data;
• and
• storing in the analog memory cells second data in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data,
• wherein the first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell,
• wherein storing the first and second data comprises evaluating a condition with respect to the analog memory cells and, based on the condition, selecting to store the first and second data using one of a first version of the programming operations, in which at all times during the second programming operation the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell, and a second version of the programming operations that is different from the first version, and
• wherein evaluating the condition comprises performing at least one action selected from a group of actions consisting of:
• assessing a size of a data item to be stored in the analog memory cells;
• identifying a pattern indicating an end of the data item to be stored in the analog memory cells;
• and
• assessing an elapsed time since a previous programming operation.

A method for data storage, comprising:

• storing first data in analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data;
• and
• storing in the analog memory cells second data in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data,
• wherein the first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell,
• wherein storing the first and second data comprises evaluating a condition with respect to the analog memory cells and, based on the condition, selecting to store the first and second data using one of a first version of the programming operations, in which at all times during the second programming operation the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell, and a second version of the programming operations that is different from the first version, and
• wherein the condition is evaluated after the first data was stored using the second version and before storing the second data, and comprising, upon selecting the first version, adjusting the analog values of at least some of the analog memory cells to match the first version of the programming operations.

A data storage apparatus, comprising:

• a plurality of analog memory cells;
• and
• circuitry, which is configured to store first data in a group of the analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data, and to store in the group of the analog memory cells second data in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data, wherein the first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell in the group remains unambiguously indicative of the respective bit value of the first data stored in that memory cell,
• wherein the first and second programming operations are defined such that the analog values that are potentially reached during the second programming operation by the memory cells that store a first bit value of the first data are contained in a first range, and the analog values that are potentially reached during the second programming operation by the memory cells that store a second bit value of the first data, different from the first bit value, are contained in a second range that does not overlap the first range, and
• wherein the circuitry is configured to reconstruct the first data following an interruption in the second programming operation by reading the analog values from the memory cells using a read threshold positioned between the first and second ranges.

A data storage apparatus, comprising:

• a plurality of analog memory cells;
• and
• circuitry, which is configured to store first data in a group of the analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data, and to store in the group of the analog memory cells second data in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data, wherein the first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell in the group remains unambiguously indicative of the respective bit value of the first data stored in that memory cell,
• wherein the circuitry is configured to evaluate a condition with respect to the analog memory cells and, based on the condition, to select to store the first and second data using one of a first version of the programming operations, in which at all times during the second programming operation the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell, and a second version of the programming operations that is different from the first version, and
• wherein the circuitry is configured to evaluate the condition by performing at least one action selected from a group of actions consisting of:
• assessing a size of a data item to be stored in the analog memory cells;
• identifying a pattern indicating an end of the data item to be stored in the analog memory cells;
• and
• assessing an elapsed time since a previous programming operation.

A data storage apparatus, comprising:

• a plurality of analog memory cells;
• and
• circuitry, which is configured to store first data in a group of the analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data, and to store in the group of the analog memory cells second data in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data, wherein the first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell in the group remains unambiguously indicative of the respective bit value of the first data stored in that memory cell,
• wherein the circuitry is configured to evaluate a condition with respect to the analog memory cells and, based on the condition, to select to store the first and second data using one of a first version of the programming operations, in which at all times during the second programming operation the analog value of each memory cell remains unambiguously indicative of the respective bit value of the first data stored in that memory cell, and a second version of the programming operations that is different from the first version, and
• wherein the circuitry is configured to evaluate the condition after storing the first data using the second version and before storing the second data, and, upon selecting the first version, to adjust the analog values of at least some of the analog memory cells to match the first version of the programming operations.

A data storage apparatus, comprising:

• an interface, which is operative to communicate with a memory device comprising a plurality of analog memory cells;
• and
• circuitry, which is configured to store first data in a group of the analog memory cells using a first programming operation, which writes to the memory cells respective analog values representing respective bit values of the first data, and to store in the group of the analog memory cells second data in addition to the first data using a second programming operation, which modifies the respective analog values of the memory cells so as to represent bit value combinations of the first and second data, wherein the first and second programming operations are defined such that, at all times during the second programming operation, the analog value of each memory cell in the group remains unambiguously indicative of the respective bit value of the first data stored in that memory cell,
• wherein the first and second programming operations are defined such that the analog values that are potentially reached during the second programming operation by the memory cells that store a first bit value of the first data are contained in a first range, and the analog values that are potentially reached during the second programming operation by the memory cells that store a second bit value of the first data, different from the first bit value, are contained in a second range that does not overlap the first range, and
• wherein the circuitry is configured to reconstruct the first data following an interruption in the second programming operation by reading the analog values from the memory cells using a read threshold positioned between the first and second ranges.