Nonvolatile semiconductor memory
AssigneeKabushiki Kaisha Toshiba
InventorsMariko Hase, Toshimasa Namekawa
Life of this patent
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Abstract
A nonvolatile semiconductor memory according to an aspect of the invention includes a memory cell array and a power supply circuit. The memory cell array includes memory cells each having an insulating film and being programmed to store information by inflicting an electric stress on the insulating film to break the insulating film. The power supply circuit supplies to the memory cell a program voltage for the electric stress depending on a negative temperature coefficient the electric stress.
Claims20
A nonvolatile semiconductor memory comprising:
- a memory cell array that includes memory cells each having an insulating film and being programmed to store information by inflicting an electric stress on the insulating film to break the insulating film;
- and
- a power supply circuit that supplies to the memory cell a program voltage for the electric stress depending on a negative temperature coefficient.
A nonvolatile semiconductor memory comprising:
- a memory cell array that includes memory cells each having an insulating film and being programmed to store information by inflicting an electric stress on the insulating film to break the insulating film, a time necessary to break the insulating film correlating with a temperature and the electric stress;
- and
- a power supply circuit that supplies to the memory cell a program voltage for the electric stress having the predetermined correlation with the temperature.
A nonvolatile semiconductor memory comprising:
- a memory cell array that includes memory cells each having an insulating film and being programmed to store information by inflicting an electric stress on the insulating film to break the insulating film;
- and
- a power supply circuit that includes a band gap reference circuit, the band gap reference circuit including a plurality of resistance elements and a plurality of diodes to generate a reference voltage, the plurality of resistance elements including a variable resistive element, the power supply circuit generating a program voltage for the electric stress to the memory cell based on the reference voltage.
Dependencies are inferred from the claim text.