Data storage in circuit elements with changed resistance
AssigneeHewlett-Packard Development Company, L.P.
InventorsDonald W. Schulte, David D. Hall, Terry Mcmahon
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Abstract
A method of storing data in an array of circuit elements, said method comprising injecting a current into selected circuit elements, said current causing a persistent change in a resistance of said selected circuit elements from a first resistance to a second higher resistance indicative of a binary data bit, wherein said current does not break an electrical circuit in which said circuit element is disposed.
Claims18
A method of storing data in an array of single layer polysilicon link elements, said method comprising injecting a current into selected single layer polysilicon link elements by applying a burst of multiple voltage pulses to each of said selected single layer polysilicon link elements, said current causing a persistent change in a resistance of polysilicon material making up said selected single layer polysilicon link elements from a first resistance to a second higher resistance indicative of a binary data bit, wherein said current does not alter the geometric shape of said single layer polysilicon link elements.
A data storage device including a circuit element comprising:
- a single layer polysilicon body, said body having a first end, a second end, and a central portion;
- a first plurality of electrical contacts interposed between a first lead and said first end such that said first lead is in electrical contact with said first end;
- and
- a second plurality of electrical contacts interposed between a second lead and said second end such that said second lead is in electrical contact with said second end;
- wherein an electrical resistance of said central portion is permanently increased without breaking electrical connectivity between said first end and said second end upon application of a programming current so as to indicate a particular binary data bit, said programming current being achieved by applying a burst of multiple voltage pulses across said central portion.
A single layer polysilicon link forming an undisrupted electrical pathway between a first contact and a second contact, the single layer polysilicon link having an initial low resistance state with dopants distributed through a grain structure of the single layer polysilicon link such that upon application of a burst of multiple voltage pulses through the single layer polysilicon link the dopants are aggregated to form a second high resistance state.
Dependencies are inferred from the claim text.