Programming of analog memory cells using a single programming pulse per state transition

A data storage apparatus, comprising:

• a plurality of analog memory cells, for which multiple programming states are defined, such that the programming states represent respective combinations of more than one bit and correspond to respective, different levels of a physical quantity stored in the memory cells;
• and
• circuitry, which is coupled to the memory cells and is configured to store data in the memory cells by applying to the memory cells programming pulses that cause the levels of the physical quantity stored in the memory cells to transition between the programming states, such that a given transition is caused by only a single programming pulse, without verifying the levels of the physical quantities caused by the programming pulses.