Image pickup apparatus including a driving circuit to control a clamping switch so as to hold signals in holding capacitors

An image pickup apparatus comprising:

• a plurality of pixels arranged in a matrix, each including a photoelectric converting element;
• a plurality of capacitors each for storing signals from said plurality of pixels within a column of the matrix at first terminals;
• a plurality of clamping switches each for setting a second terminal of each of said plurality of capacitors to a predetermined electric potential;
• a plurality of gain amplifiers each with a variable amplification factor and each for amplifying the signals stored in a corresponding one of the plurality of capacitors;
• a plurality of first storing units each for storing signals from said second terminals of said plurality of capacitors via a corresponding one of the plurality of gain amplifiers;
• a plurality of second storing units each for storing the signals from said second terminals of said plurality of capacitors via the corresponding one of the plurality of gain amplifiers;
• a first common output line to which the signals from said plurality of first storing units are sequentially output;
• a second common output line to which the signals from said plurality of second storing units are sequentially output;
• and
• a difference circuit for operating a difference between the signal from said first common output line and the signal from said second common output line, wherein
• each of said first storing units includes a first transfer gate and a first holding capacitor for holding the transferred signal, and each of said second storing units includes a second transfer gate and a second holding capacitor for holding the transferred signal, and wherein
• said image pickup apparatus further comprises a driving circuit arranged so that after said clamping switch is turned off at a first timing, said clamping switch is continuously held in an OFF state and said first transfer gate is turned off at a second timing, thereby holding a first signal which is obtained from said second terminal of said capacitor into said first holding capacitor via the corresponding gain amplifier, and after said clamping switch is turned off at the first timing, said clamping switch is continuously held in the OFF state and said second transfer gate is turned off at a third timing, thereby holding a second signal which is obtained from said second terminal of said capacitor into said second holding capacitor via the corresponding gain amplifier.