Adjustble gain signal processing device
AssigneeOki Semiconductor Co., Ltd.
InventorsTsuguto Maruko, Naotaka Saito
Life of this patent
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Abstract
A CLK generating section of a digital ALC generates a multiplication clock signal that is obtained by multiplying a triangular wave generated at a triangular wave generating circuit. On the basis of the multiplication clock signal, a signal converting section converts a one-bit digital audio signal outputted from an outputting stage into a multi-bit digital signal, and monitors a voltage value of an input signal. A level controlling section controls a voltage level on the basis of a target level inputted from an exterior of an LSI. On the basis of a control signal inputted from an exterior of the LSI, a volume controlling section outputs, to a PGA, a gain adjusting signal so as to vary a waveform of an input signal.
Claims5
A signal processing device comprising:
- an amplifying section that, on the basis of a gain set in advance, amplifies a level of an analog signal inputted from an exterior;
- a pulse width modulation signal generating section that generates a pulse width modulation signal that is a signal obtained by pulse-width modulating the amplified analog signal, by a triangular wave outputted from a triangular wave outputting section;
- a digital signal processing section that outputs a digital signal obtained by subjecting the pulse width modulation signal to a predetermined processing, the predetermined processing including controlling a voltage level of the digital signal based, at least in part, on the gain set in advance;
- and
- a gain adjusting section that detects the voltage level of the digital signal or the pulse width modulation signal, and adjusts gain of the amplifying section on the basis of a detected voltage level and a control signal.
Dependencies are inferred from the claim text.