Integrated front-end passive equalizer and method thereof
AssigneeRealtek Semiconductor Corp.
InventorsGerchih Chou, Chia-Liang Lin
Life of this patent
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Abstract
A passive equalizer circuit incorporated at a front-end of an integrated receiver circuit uses passive components that are distributed between inside and outside of an integrated circuit package. The passive equalizer circuit has off-chip components that are placed on a printed circuit board and on-chip components that are fabricated on a common integrated circuit die as a receiver chip. The on-chip components include one or more variable resistors for adjusting a degree of equalization. The off-chip components include one or more resistors for fine tuning input impedance matching of the integrated receiver circuit.
Claims20
A passive equalizer for a receiver chip comprising:
- a first passive circuit placed outside of an IC package of the receiver chip, wherein the first passive circuit comprises a first resistor coupled in series between a first transmission line and a first IC package pin, and the first IC package pin is coupled to a first IC pad on an IC die inside the IC package using a first bond wire;
- and
- a shunt circuit fabricated on the IC die with the receiver chip, wherein the shunt circuit is coupled in a parallel configuration with a first input of the receiver chip to the first IC pad, and the shunt circuit comprises a series resistor-inductor network.
A passive equalizer comprising:
- a pair of series resistor-capacitor circuits placed outside of an integrated circuit package of a receiver chip and configured to electrically couple a pair of transmission lines to a pair of integrated circuit package pins;
- a pair of bond wires electrically coupled between said pair of integrated circuit package pins and a pair of pads on an integrated circuit die inside the integrated circuit package;
- and
- a series resistor-inductor network electrically coupled between said pair of pads on the integrated circuit die, wherein the series resistor-inductor network and the receiver chip are fabricated on the integrated circuit die.
A method of equalizing transmitted signals using distributed passive circuits, the method comprising:
- coupling a first input signal from a first transmission line to a first IC package pin using a first series resistor-capacitor circuit placed on a printed circuit board outside of an IC package for a receiver chip;
- coupling the first IC package pin to a first IC pad on an IC die using a first bond wire;
- and
- coupling a series resistor-inductor network to the first IC pad in shunt with a first input terminal of the receiver chip on the IC die, wherein the series resistor-inductor network is formed on the IC die with the receiver chip, and a combination of the series resistor-inductor network and the first series resistor-capacitor circuit is used to provide impedance matching and to generate an equalized signal at the first input terminal of the receiver chip.
Dependencies are inferred from the claim text.