Symmetric load delay cell oscillator

A symmetric load circuit comprising:

• a supply voltage node;
• a current source-connected transistor having a gate, a source, and a drain, wherein the source of the current source-connected transistor is coupled to the supply voltage node;
• a diode-connected transistor having a gate, a source coupled to the source of the current source-connected transistor, and a drain coupled to the drain of the current source-connected transistor;
• and
• a level shift circuit that adjusts a gate-to-source voltage (VGS) of the diode-connected transistor, wherein the level shift circuit includes a transistor having a gate, a source, and a drain, wherein the gate of the transistor of the level shift circuit is coupled to the drain of the current source-connected transistor and to the drain of the diode-connected transistor, and wherein the source of the transistor of the level shift circuit is coupled to the gate of the diode-connected transistor.

An oscillator comprising:

• a current source-connected transistor of a symmetric load;
• a diode-connected transistor of the symmetric load, wherein a drain of the current source-connected transistor is coupled to a drain of the diode-connected transistor;
• and
• means for adjusting a gate voltage of the diode-connected transistor such that a lower swing limit of an oscillating signal of the oscillator remains substantially constant as an oscillating frequency of the oscillator changes, wherein the means for adjusting a gate voltage of the diode-connected transistor comprises:
• a transistor having
• a gate coupled to the drain of the current source-connected transistor and to the drain of the diode-connected transistor, and
• a source coupled to a gate of the diode-connected transistor of the symmetric load.

A method comprising:

• (a) controlling a gate-to-source voltage of a first diode-connected transistor of a first symmetric load such that a swing limit voltage of an oscillating signal on a node of the first symmetric load is controlled to have a substantially constant value, wherein the first symmetric load includes a first current source-connected transistor, wherein a source of the first diode-connected transistor is coupled to a source of the first current source-connected transistor, and wherein a drain of the first diode-connected transistor is coupled to a drain of the first current source-connected transistor;
• (b) generating a control signal using a feedback control loop;
• and
• (c) supplying the control signal to a first level shift circuit such that the first level shift circuit controls the gate-to-source voltage in (a).