Signal processing apparatus including latch circuit
AssigneeSanken Electric Co., Ltd.
InventorsHiroki Suzuki, Akihiko Futami
Life of this patent
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Abstract
A signal processing apparatus includes: a latch circuit; a set pulse generation circuit; a reset pulse generation circuit; and a correction set signal forming circuit. The correction set signal forming circuit forms a correction set signal for applying a set instruction continuously during a time period from a time point of a front edge of the set pulse generated from the set pulse generation circuit or a time point delayed from the time point of the front edge to a time point at which the reset pulse is generated. The correction set signal forming circuit supplies the correction set signal to the set input terminal of the latch circuit.
Claims3
A signal processing apparatus comprising:
- a latch circuit comprising a set input terminal, a reset input terminal and an output terminal, and being configured to give a priority to a reset operation;
- a set pulse generation circuit configured to generate a set pulse for placing the latch circuit in a set state;
- a reset pulse generation circuit connected to the reset input terminal of the latch circuit;
- and
- a correction set signal forming circuit connected to the set pulse generation circuit, the reset pulse generation circuit and the set input terminal of the latch circuit,
- wherein the correction set signal forming circuit forms a correction set signal for applying a set instruction continuously during a time period from a time point of a front edge of the set pulse generated from the set pulse generation circuit or a time point delayed from the time point of the front edge to a time point at which the reset pulse is generated, and
- wherein the correction set signal forming circuit supplies the correction set signal to the set input terminal of the latch circuit.
Dependencies are inferred from the claim text.