US 7,924,073 B2 · Semiconductor memory device having back-bias voltage in stable range

Abstract

A back-bias voltage generating circuit controls the back-bias voltage in a predetermined range by detecting the back-bias voltage in case the back-bias voltage level decreases below a predetermined target level. The circuit includes first and second detecting units outputting respective detection signals, which detect a voltage level of the terminal based on respective higher first and lower second target levels. An oscillator generates an oscillation signal that oscillates at a predetermined frequency, in response to a detection signal of the first voltage detecting unit. A charge pumping unit drives the terminal by performing charge pumping in response to the oscillation signal. A voltage level control unit controls the voltage level of the terminal in response to the detection signals, whereby the terminal's voltage level is lower than the first target level and higher than the second target level.

Claims17

Dependent claims

A semiconductor memory device comprising:

a first voltage detecting unit configured to detect a voltage level of a back-bias voltage terminal based on a first target level to output a first detection signal;
a second voltage detecting unit configured to detect the voltage level of the back-bias voltage terminal based on a second target level to output a second detection signal, wherein the second target level is lower than the first target level;
an oscillator configured to generate an oscillation signal, which is oscillated at a predetermined frequency, in response to the first detection signal;
a charge pumping unit configured to drive the back-bias voltage terminal by performing a charge pumping operation in response to the oscillation signal;
and
a voltage level control unit configured to control a back-bias voltage of the back-bias voltage terminal to be between the first target level and the second target level in response to the first detection signal and the second detection signal by switching on a connection between the back-bias voltage terminal and a ground voltage.

3 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device having back-bias voltage in stable range

Life of this patent

Semiconductor memory device having back-bias voltage in stable range

Life of this patent

Abstract

Claims17