Synchronization detection circuit, pulse width modulation circuit using the same, and synchronization detection method

A synchronization detection method comprising:

• generating high-speed multiphase clock signals synchronized in phase with a reference clock signal, having a frequency obtained by multiplying a frequency of the reference clock signal, and having a plurality of different phases;
• generating low-speed multiphase clock signals synchronized in phase with the reference clock signal, having a frequency obtained by dividing a frequency of the high-speed multiphase clock signals, and having a plurality of different phases;
• selecting a representative clock signal capable of specifying a cycle of each of the high-speed multiphase clock signals from among the low-speed multiphase clock signals;
• comparing a synchronous signal with the high-speed multiphase clock signals;
• comparing the synchronous signal with the representative clock signal;
• and
• generating a synchronous position signal for specifying a synchronous position of the synchronous signal based on a comparison result between the synchronous signal and the high-speed multiphase clock signals and a comparison result between the synchronous signal and the representative clock signal.