Accelerated programming technique for integrated circuits

A system for transmitting data to a configurable integrated circuit having a synchronous design, the system comprising:

• a storage device containing data;
• an integrated circuit in communication with the storage device containing data, the integrated circuit including a clock source to generate a clock signal for transmission to clock control circuitry and a master controller, the clock control circuitry distributing the clock signal to the storage device and delay circuitry, wherein the delay circuitry establishes a predetermined delay between a launch edge being sensed by the storage device and a capture edge being sensed by a data latch capturing data from the storage device to compensate for a delay between transmitting the launch edge and sensing of the launch edge at the storage device to ensure the data arrives at the data latch prior to the capture edge.

The system as recited in 9 wherein a capacitor is connected to an output of each of the buffers.

A system for transmitting data to a configurable integrated circuit synchronously, comprising:

• an integrated circuit including an array of programmable elements, control circuitry in electrical communication with the array, a data latch in electrical communication with a storage device to receive configuration data from the storage device;
• a clock source for transmitting a clock signal to the storage device and the data latch through the control circuitry, the integrated circuit including delay circuitry in communication with the clock source and the data latch, wherein the storage device launches the configuration data in response to sensing a launch edge of the clock signal received through the control circuitry, and wherein the delay circuitry establishes a predetermined delay between the launch edge being sensed by the storage device and the capture edge being sensed by the data latch to compensate for a delay between transmitting the launch edge and sensing of the launch edge at the storage device to ensure the configuration data arrives at the data latch prior to the capture edge.