Electronic package having stress buffer layer on mounting surface thereof, and method for manufacturing same

A method of producing an electronic package containing an electronic component, comprising:

• preparing a base member forming at least a part of the electronic package and having a lower surface;
• forming a pair of through-holes through the base member;
• applying a stress buffer layer over at least a part of the lower surface of the base member, wherein the stress buffer layer comprises a pair of layer members made of a conductive material and formed respectively over the through-holes of the base member;
• and
• forming external electrodes on the stress buffer layer opposite to the base member such that the electrodes are electrically connected via the pair of layer members and the through-holes to the electronic component in the electronic package, wherein the external electrodes are arranged connectable to a circuit board for electrical connection.

An electronic package containing an electronic component, comprising:

• a base member forming at least a part of the electronic package and having a lower surface, wherein the base member is formed with a pair of through-holes;
• external electrodes electrically connected to the electronic component in the electronic package, wherein the external electrodes are arranged connectable to a circuit board for electrical connection;
• and
• a stress buffer layer applied over at least a part of the lower surface of the base member between the electrodes and the base member, wherein the stress buffer layer comprises first and second sub-layers each formed with a pair of through-holes, and the external electrodes are electrically connected to the electronic component through the through-holes of the first and second sub-layers, and wherein the through-holes formed in the first sub-layer and the through-holes formed in the second sub-layer are unaligned, and the external electrodes each have a bridge located between the first and second sub-layer for electrically connecting the through-holes of the first and second sub-layers.

A method of producing an electronic package containing an electronic component, comprising:

• preparing a base member forming at least a part of the electronic package and having a lower surface;
• forming a pair of through-holes through the base member;
• applying a stress buffer layer over at least a part of the lower surface of the base member, wherein the stress buffer layer comprises first and second sub-layers each formed with a pair of through-holes, and the through-holes formed in the first sub-layer and the through-holes formed in the second sub-layer are unaligned;
• and
• forming external electrodes on the stress buffer layer opposite to the base member, wherein each of the electrodes comprises a bridge between the first and second sub-layers for electrically connecting the through-holes of the first and second sub-layers to thereby connect the external electrode to the electronic component in the electronic package via the through-holes of the first and second sub-layers and the through-holes of the base member, and wherein the external electrodes are arranged connectable to a circuit board for electrical connection.