Semiconductor chip with solder joint protection ring
AssigneeAdvanced Micro Devices, Inc.
InventorsMohammad Khan, Jun Zhai, Ranjit Gannamani, Raj N. Master
Life of this patent
Estimating the term…
Abstract
Various semiconductor chip arrangements and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip that has an external peripheral wall to a first side of a substrate. A first metallic ring is coupled to the first side of the substrate. The first metallic ring has an internal peripheral wall that frames the semiconductor chip and is separated from the external peripheral wall by a gap. The first metallic ring has a coefficient of thermal expansion less than about 6.0 10−6 K−1.
Claims23
A method of manufacturing, comprising:
- coupling a semiconductor chip to a first side of a substrate, the semiconductor chip having an external peripheral wall and a first coefficient of thermal expansion, the substrate having a second coefficient of thermal expansion;
- and
- coupling a first metallic ring to the first side of the substrate, the first metallic ring having an internal peripheral wall that frames the semiconductor chip and is separated from the external peripheral wall by a gap, the first metallic ring having a coefficient of thermal expansion nearer to the first coefficient of thermal expansion than to the second coefficient of thermal expansion and less than about 6.0 10−6K−1.
A method of manufacturing, comprising:
- coupling a semiconductor chip to a first side of a substrate, the semiconductor chip having a first coefficient of thermal expansion and a first footprint, the substrate having a second coefficient of thermal expansion and a second footprint;
- forming a first metallic ring with an internal footprint larger than the first footprint of the semiconductor chip and an external footprint smaller than the second footprint of the substrate, the first metallic ring having a coefficient of thermal expansion nearer to the first coefficient of thermal expansion than to the second coefficient of thermal expansion and less than about 6.0 10−6 K−1.
An apparatus, comprising:
- a semiconductor chip coupled to a first side of a substrate and having an external peripheral wall, the semiconductor chip having a first coefficient of thermal expansion, the substrate having a second coefficient of thermal expansion;
- and
- a first metallic ring coupled to the first side of the substrate, the first metallic ring having an internal peripheral wall that frames the semiconductor chip and is separated from the external peripheral wall by a gap, the first metallic ring having a coefficient of thermal expansion nearer to the first coefficient of thermal expansion than to the second coefficient of thermal expansion and less than about 6.0 10−6K−1.
Dependencies are inferred from the claim text.