Semiconductor device, manufacturing method thereof, and data processing system
AssigneeElpida Memory, Inc.
InventorHiroshi Kujirai
Life of this patent
Estimating the term…
Abstract
A bottom of a gate trench has a first bottom relatively far from an STI and a second bottom relatively near from the STI. A portion, in an active region, configuring the second bottom of the gate trench configures a side-wall channel region, and has a thin-film SOI structure sandwiched between the gate electrode and the STI. On the other hand, a portion configuring the first bottom of the gate trench functions as a sub-channel region. A curvature radius of the second bottom is larger than a curvature radius of the first bottom. In an approximate center in a length direction of the gate trench, a bottom of a trench is approximately flat, and on the other hand, in ends of the length direction, a nearly whole bottom of the trench is curved.
Claims14
A semiconductor device, comprising:
- an active region having a source region and a drain region in which a gate trench is formed between the source region and the drain region;
- an element isolation region surrounding the active region;
- and
- a gate electrode of which at least one portion is buried in the gate trench,
- wherein the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near from the element isolation region, and a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion, and
- wherein the active region includes a main channel region that is positioned at the second bottom portion of the gate trench, the main channel region has a thin-film structure sandwiched between the gate electrode and the element isolation region.
A semiconductor device, comprising:
- an active region having a source region and a drain region in which a gate trench is formed between the source region and the drain region;
- an element isolation region surrounding the active region;
- and
- a gate electrode of which at least one portion is buried in the gate trench,
- wherein the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near from the element isolation region, and a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion, and
- wherein the second bottom portion of the gate trench has an inversely arched side-wall.
A semiconductor device, comprising:
- an active region having a source region and a drain region in which a gate trench is formed between the source region and the drain region;
- an element isolation region surrounding the active region;
- and
- a gate electrode of which at least one portion is buried in the gate trench,
- wherein the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near from the element isolation region, and a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion, and
- wherein a length of the gate trench within the active region is 40 to 70 nm, and a width of the gate trench is 80 to 90% of the length of the gate trench.
A manufacturing method of a semiconductor device comprising:
- forming an element isolation region on a semiconductor substrate so as to form a plurality of active regions separated one another by the element isolation region;
- forming a gate trench intersecting the active regions by etching the active regions so that a bottom of the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near from the element isolation region and so that a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion;
- forming a gate oxide film on an inner wall surface of the gate trench;
- and
- embedding a gate electrode inside the gate trench formed therein with the gate oxide film.
A data processing system having a memory device, a data processor, and a system bus connecting the memory device and the data processor, the memory device comprising:
- an active region having a source region and a drain region in which a gate trench is formed between the source region and the drain region;
- an element isolation region surrounding the active region;
- and
- a gate electrode of which at least one portion is buried in the gate trench,
- wherein the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near from the element isolation region, and a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion, and
- wherein the active region includes a main channel region that is positioned at the second bottom portion of the gate trench, the main channel region has a thin-film structure sandwiched between the gate electrode and the element isolation region.
A semiconductor device, comprising:
- an active region having a source region and a drain region in which a gate trench is formed between the source region and the drain region;
- an element isolation region surrounding the active region;
- and
- a gate electrode of which at least one portion is buried in the gate trench,
- wherein the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near to the element isolation region, and
- wherein a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion.
A data processing system having a memory device, a data processor, and a system bus connecting the memory device and the data processor, the memory device comprising:
- an active region having a source region and a drain region in which a gate trench is formed between the source region and the drain region;
- an element isolation region surrounding the active region;
- and
- a gate electrode of which at least one portion is buried in the gate trench,
- wherein the gate trench has a first bottom portion relatively far from the element isolation region and a second bottom portion relatively near from the element isolation region, and
- wherein a curvature radius of the second bottom portion is larger than a curvature radius of the first bottom portion.
Dependencies are inferred from the claim text.