Split gate non-volatile memory cell with improved endurance and method therefor

A non-volatile memory cell comprising:

• a substrate in which is formed a source region and a drain region defining a channel region between the source region and the drain region;
• a select gate structure formed over the substrate, wherein the select gate structure overlies a first portion of the channel region;
• a control gate structure formed adjacent to the select gate structure, wherein the control gate structure overlies a second portion of the channel region, wherein the first portion and the second portion overlap, wherein the control gate structure includes a nanocrystal stack having a height, wherein the control gate structure has a convex shape in a corner region formed at an intersection of a first plane substantially parallel to a top surface of the substrate and a second plane substantially parallel to a side surface of the control gate structure, wherein a ratio of a radius of the control gate structure in the corner region to the height of the nanocrystal stack is at least 0.5.