Wafer level surface passivation of stackable integrated circuit chips

A method for making a passivated semiconductor die, the method comprising

• providing a wafer having a front side in which semiconductor chip active regions are formed, the semiconductor chip active regions being bounded by saw streets, the semiconductor chip active regions having interconnect pads arranged in an interconnect margin along an interconnect edge thereof;
• cutting the wafer front side on streets that are fronted by interconnect margins to a depth greater than a die thickness to form die edges and sidewalls;
• cutting the wafer front side on streets that are not fronted by interconnect margins to a depth less than the eventual die thickness to form die edges and a part of die sidewalls;
• applying a conformal coating to the front side, the die edges, the sidewalls and the part sidewalls;
• thinning the wafer to the die thickness;
• and
• cutting through the wafer on streets that are not fronted by interconnect margins.

A method for making a passivated semiconductor die, the method comprising

• providing a wafer having a front side in which semiconductor chip active regions are formed, the semiconductor chip active regions being bounded by saw streets, the semiconductor chip active regions having interconnect pads arranged in an interconnect margin along an interconnect edge thereof;
• cutting the wafer front side on streets that are fronted by interconnect margins to a depth greater than a die thickness to form die edges and sidewalls;
• cutting the wafer front side on streets that are not fronted by interconnect margins to a depth less than the eventual die thickness to form die edges and a part of die sidewalls;
• applying a conformal coating to the front side, the die edges, the sidewalls and the part sidewalls;
• thinning the wafer to the die thickness;
• applying a die attach film to the wafer backside;
• and
• cutting through the wafer on streets that are not fronted by interconnect margins.

A method for making a passivated semiconductor die, the method comprising

• providing a wafer having a front side in which semiconductor chip active regions are formed, the semiconductor chip active regions being bounded by saw streets, the semiconductor chip active regions having interconnect pads arranged in an interconnect margin along an interconnect edge thereof;
• thinning the wafer to a die thickness;
• cutting through the wafer on streets that are fronted by interconnect margins to form die edges and sidewalls;
• cutting the wafer front side on streets that are not fronted by interconnect margins to a depth less than the die thickness to form die edges and a part of die sidewalls;
• applying a conformal coating to the front side, the die edges, the sidewalls and the part sidewalls;
• and
• cutting through the wafer on streets that are not fronted by interconnect margins.

A method for making a passivated semiconductor die, the method comprising

• providing a wafer having a front side in which semiconductor chip active regions are formed, the semiconductor chip active regions being bounded by saw streets, the semiconductor chip active regions having interconnect pads arranged in an interconnect margin along an interconnect edge thereof;
• thinning the wafer to a die thickness;
• cutting through the wafer on streets that are fronted by interconnect margins to form die edges and sidewalls;
• applying a conformal coating to the front side, the die edges and the sidewalls;
• and
• cutting through the wafer on streets that are not fronted by interconnect margins.