US 7,923,319 B2Granted

Method for manufacturing a semiconductor integrated circuit device circuit device

AssigneeRenesas Electronics Corporation

InventorsTakuya Futase, Shuhei Murata, Takeshi Hayashi

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Abstract

When a natural oxide film is left at the interface between a metal silicide layer and a silicon nitride film, in various heating steps (steps involving heating of a semiconductor substrate, such as various insulation film and conductive film deposition steps) after deposition of the silicon nitride film, the metal silicide layer partially abnormally grows due to oxygen of the natural oxide film occurring on the metal silicide layer surface. A substantially non-bias (including low bias) plasma treatment is performed in a gas atmosphere containing an inert gas as a main component on the top surface of a metal silicide film of nickel silicide or the like over source/drain of a field-effect transistor forming an integrated circuit. Then, a silicon nitride film serving as an etching stop film of a contact process is deposited. As a result, without causing undesirable cutting of the metal silicide film, the natural oxide film over the top surface of the metal silicide film can be removed.

Claims17

Dependent claims

A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming a MISFET in a region in the vicinity of a first main surface of a semiconductor wafer,
the MISFET having:
(x1) source/drain regions disposed in a surface region of the first main surface;
(x2) a gate insulation film disposed over the first main surface;
(x3) a gate electrode disposed over the gate insulation film;
and
(x4) a silicide film disposed over the source/drain regions;
(b) after the step (a), setting the semiconductor wafer over a first lower electrode in a first gas phase treatment chamber with the first main surface facing upward;
(c) after the step (b), while the semiconductor wafer being set over the first lower electrode grounded with the first main surface facing upward, carrying out a plasma treatment on the first main surface under a first gas atmosphere which contains an inert gas as one of main components and which substantially does not contain hydrogen;
and
(d) after the step (c), while the semiconductor wafer being set over the first lower electrode with the first main surface facing upward, forming a silicon nitride film over the first main surface by a CVD treatment;
(e) forming a silicon oxide film type premetal interlayer insulation film over the silicon nitride film;
(f) opening a contact hole in the premetal interlayer insulation film with the silicon nitride film as an etching stop film;
(g) after the step (f), etching the silicon nitride film, thereby to extend the contact hole to the top surface of the silicide film disposed over the source/drain regions;
(h) after the step (g), setting the semiconductor wafer over a second lower electrode in a second gas phase treatment chamber with the first main surface facing upward;
(i) after the step (h), while the semiconductor wafer being set over the second lower electrode grounded with the first main surface facing upward, carrying out a plasma treatment on the first main surface under a second gas atmosphere containing an inert gas as one of main components;
(j) after the step (i), while the semiconductor wafer being set over the second lower electrode grounded with the first main surface facing upward, forming a barrier metal film over the inner surface of the contact hole;
and
(k) after the step (j), filling the contact hole with a metal containing tungsten as a main component.

16 more elements

A method for manufacturing a semiconductor integrated circuit device, comprising the steps of:

(a) forming a MISFET in a region in the vicinity of a first main surface of a semiconductor wafer,
the MISFET having:
(x1) source/drain regions disposed in a surface region of the first main surface;
(x2) a gate insulation film disposed over the first main surface;
(x3) a gate electrode disposed over the gate insulation film;
and
(x4) a silicide film disposed over the source/drain regions;
(b) forming a silicon oxide film type premetal interlayer insulation film over the silicon nitride film;
(c) opening a contact hole in the premetal interlayer insulation film with the silicon nitride film as an etching stop film;
(d) after the step (c), etching the silicon nitride film, thereby to extend the contact hole to the top surface of the silicide film disposed over the source/drain regions;
(e) after the step (d), setting the semiconductor wafer over a lower electrode in a gas phase treatment chamber with the first main surface facing upward;
(f) after the step (e), while the semiconductor wafer being set over the lower electrode grounded with the first main surface facing upward, carrying out a plasma treatment on the first main surface under a gas atmosphere which contains an inert gas as one of main components and which substantially does not contain hydrogen;
(g) after the step (f), while the semiconductor wafer being set over the first lower electrode with the first main surface facing upward, forming a barrier metal film over the inner surface of the contact hole;
and
(h) after the step (g), filling the contact hole with a metal containing tungsten as a main component.

12 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/622,524Filed 20 Nov 2009
Priority: JP 2008-30043926 Nov 2008
Published: US 2010/0129974 A127 May 2010
Granted: 12 Apr 2011
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10P 72/0454
Characterised by the layout of the process chambers: surrounding a central transfer chamber
H10D 30/792
Arrangements for exerting mechanical stress on the crystal lattice of the channel regions: comprising applied insulating layers, e.g. stress liners
H10D 84/0167
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their channels
H10D 84/017
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their source or drain regions, e.g. silicided source or drain regions