Ink ejection device including a silicon chip having a heater stack positioned over a corresponding power transistor
AssigneeLexmark International, Inc.
InventorsYimin Guan, Kristi Maggard Rowe, Timothy Lowell Strunk, Carl Edmond Sullivan
Life of this patent
Estimating the term…
Abstract
A silicon chip has a plurality of ink jetting structures. Each ink jetting structure of the plurality of ink jetting structures includes a heater stack having an electrical heater element. A power transistor is electrically connected to the electrical heater element. A planarization layer is interposed between the power transistor and the heater stack. The planarization layer has a planar base surface on which the heater stack is formed.
Claims14
A semiconductor chip having a plurality of ink jetting structures, each ink jetting structure of said plurality of ink jetting structures comprising:
- a heater stack having an electrical heater element;
- an ink ejection chamber above said electrical heater element;
- a power transistor electrically connected to said electrical heater element;
- and
- a planarization layer interposed between said power transistor and said heater stack, said planarization layer having a planar base surface on which said heater stack is formed;
- wherein said heater stack and said ink ejection chamber are formed directly above said power transistor over said planarization layer.
An ink ejection device, comprising:
- a nozzle plate having a plurality of nozzle holes;
- and
- a semiconductor chip having a plurality of ink jetting structures respectively associated with said plurality of nozzle holes, each ink jetting structure of said plurality of ink jetting structures including:
- a heater stack having an electrical heater element;
- an ink ejection chamber above said electrical heater element, said ink ejection chamber associated with one of said plurality of nozzle holes;
- a power transistor electrically connected to said electrical heater element;
- and
- a planarization layer interposed between said power transistor and said heater stack, said planarization layer having a planar base surface on which said heater stack is formed;
- wherein said heater stack, said ink ejection chamber, and said one of said plurality of nozzle holes are formed directly above said power transistor over said planarization layer.
Dependencies are inferred from the claim text.