Methods and systems for testing digital-to-analog converter/amplifier circuits

A testing apparatus, comprising:

• a summation circuit to receive a plurality of analog voltage signals, to sum the analog voltage signals, and to output a summation signal indicating the sum of the analog voltage signals;
• a signal generator to generate a blanking signal;
• and
• an analyzer circuit, coupled to receive the summation signal, comprising:
• a high speed digitizer to convert the summation signal into a digitized summation signal;
• and
• an error detection circuit, coupled to receive the digitized summation signal and the blanking signal, to check the digitized summation signal for an operating error by comparing the digitized summation signal with an error tolerance range, during a detection period of the blanking signal.

A testing apparatus, comprising:

• a high speed digitizer to receive a summation signal and to convert the summation signal into a digitized summation signal;
• a controller coupled to control the high speed digitizer circuit;
• an error detection circuit, coupled to receive the digitized summation signal and a blanking signal, to check the digitized summation signal for an operating error by comparing the digitized summation signal with an error tolerance range, during a detection period of the blanking signal;
• and
• a memory device to store a record of the detected operating error and a corresponding time stamp, the operating error being detected when the digitized summation signal is outside the error tolerance range.

A method of testing a plurality of DAC/amplifier circuits by a DAC/amplifier testing system, the method comprising:

• receiving a plurality of analog voltage signals respectively outputted by the plurality of DAC/amplifier circuits;
• summing the analog voltage signals;
• generating a summation signal indicating the sum of the analog voltage signals;
• converting the summation signal into a digitized summation signal;
• checking the digitized summation signal to detect an operating error;
• and
• storing a record of the operating error, in a memory device of the DAC/amplifier testing system, when the operating error is detected, wherein the record includes a sample of data representing the digitized summation signal.

A method of testing a plurality of DAC/amplifier circuits, the method being performed by an analyzer circuit, the method comprising:

• receiving a summation signal indicating a sum based on output voltages of the plurality of DAC/amplifier circuits;
• converting the summation signal into a digitized summation signal;
• receiving a blanking signal;
• checking the digitized summation signal for an operating error by comparing the digitized summation signal with an error tolerance range, during a detection period of the blanking signal;
• and
• storing a record of the operating error, in a memory device of the analyzer circuit, when the operating error is detected, wherein the operating error is detected when the digitized summation signal is outside the error tolerance range.