Low distortion radio frequency (RF) limiter
AssigneeAxiom Microdevices, Inc.
InventorIchiro Aoki
Life of this patent
Estimating the term…
Abstract
A limiter for minimizing an amount of phase change caused by input amplitude variation includes a variable gain amplifier configured to receive a signal having an amplitude component and a phase component and having a gain controlled by a compensation capacitance and a variable resistance, in which the compensation capacitance minimizes an effect of parasitic capacitance and the variable resistance adjusts a gain in the variable gain amplifier such that the amplitude component at an output of the variable gain amplifier remains substantially constant.
Claims8
A limiter for minimizing an amount of phase change caused by input amplitude variations, comprising:
- a differential variable gain amplifier comprising a first amplifying section and a second amplifying section, the first amplifying section having a first amplifying device configured to receive a first portion of a differential signal having an amplitude component and a phase component and having a gain controlled by a first compensation capacitance and a first variable resistance, in which the first compensation capacitance minimizes an effect of parasitic capacitance in the first amplifying section and the first variable resistance adjusts a first gain portion in the first amplifying section, the second amplifying section having a second amplifying device configured to receive a second portion of the differential signal and having a gain controlled by the second compensation capacitor and a second variable resistance, in which the second compensation capacitance minimizes an effect of parasitic capacitance in the second amplifying section and the second variable resistance adjusts a second gain portion in the second amplifying section, wherein the amplitude component at an output of the differential variable gain amplifier remains substantially constant in response to a combined adjustment of the first gain portion and the second gain portion;
- wherein the first variable resistance comprises a first plurality of series-connected transistor devices and a first plurality of corresponding resistors, each transistor device of the first plurality of series-connected transistor devices having a gate terminal coupled to a first terminal of a corresponding resistor of a first plurality of corresponding resistors, a first portion of the gain of the differential variable gain amplifier adjustable through a control terminal coupled to a second terminal of each corresponding resistor;
- and
- wherein the second variable resistance comprises a second plurality of series-connected transistor devices and a second plurality of corresponding resistors, each transistor device of the second plurality of series-connected transistor devices having a gate terminal coupled to a first terminal of a corresponding resistor of the second plurality of corresponding resistors, a second portion of the gain of the differential variable gain amplifier adjustable through a control terminal coupled to a second terminal of each corresponding resistor.
A method for minimizing an amount of phase change caused by amplitude variations, comprising:
- providing a first portion of a differential signal having amplitude modulation (AM) and phase modulation (PM) to a first amplifying portion of a differential variable gain amplifier having a first amplification device and a first variable resistance;
- coupling the first amplification device to a first compensation capacitance and the first variable resistance, in which the first compensation capacitance minimizes an effect of a parasitic capacitance in the first amplifying section and the first variable resistance adjusts a first gain portion in the first amplifying section;
- providing a second portion of the differential signal to a second amplifying portion of the differential variable gain amplifier having a second amplification device and a second variable resistance;
- coupling the second amplification device to a second compensation capacitance and the second variable resistance, in which the second compensation capacitance minimizes an effect of a parasitic capacitance in the second amplifying section and the second variable resistance adjusts a second gain portion in the second amplifying section;
- wherein the first variable resistance comprises a first plurality of series-connected transistor devices and a first plurality of corresponding resistors, each transistor device of the first plurality of series-connected transistor devices having a gate terminal coupled to a first terminal of a corresponding resistor of the first plurality of corresponding resistors, a first portion of the gain of the differential variable gain amplifier adjustable through a control terminal coupled to a second terminal of each corresponding resistor;
- wherein the second variable resistance comprises a second plurality of series-connected transistor devices and a second plurality of corresponding resistors, each transistor device of the second plurality of series-connected transistor devices having a gate terminal coupled to a first terminal of a corresponding resistor of the second plurality of corresponding resistors, a second portion of the gain of the differential variable gain amplifier adjustable through a control terminal coupled to a second terminal of each corresponding resistor;
- and
- wherein the amplitude modulation at an output of the differential variable gain amplifier is substantially removed in response to a combined adjustment of the first gain portion and the second gain portion.
A portable transceiver having a system for minimizing an amount of phase change caused by amplitude variations, comprising:
- a transmitter coupled to a receiver;
- a power amplifier associated with the transmitter, the power amplifier having a linear control characteristic, the power amplifier configured to amplify a phase-modulated (PM) signal according to the value of an amplitude-modulation (AM) control signal;
- a feedback signal taken from the power amplifier;
- a limiter configured to receive the feedback signal, the limiter comprising:
- a differential variable gain amplifier comprising a first amplifying section and a second amplifying section, the first amplifying section having a first amplifying device configured to receive a first portion of a differential signal having an amplitude component and a phase component and having a gain controlled by a first compensation capacitance and a first variable resistance, in which the first compensation capacitance minimizes an effect of parasitic capacitance in the first amplifying section and the first variable resistance adjusts a first gain portion in the first amplifying section, the second amplifying section having a second amplifying device configured to receive a second portion of the differential signal and having a gain controlled by the second compensation capacitor and a second variable resistance, in which the second compensation capacitance minimizes an effect of parasitic capacitance in the second amplifying section and the second variable resistance adjusts a second gain portion in the second amplifying section, wherein the amplitude component at an output of the differential variable gain amplifier remains substantially constant in response to a combined adjustment of the first gain portion and the second gain portion;
- wherein the first variable resistance comprises a first plurality of series-connected transistor devices and a first plurality of corresponding resistors, each transistor device of the first plurality of series-connected transistor devices having a gate terminal coupled to a first terminal of a corresponding resistor of a first plurality of corresponding resistors, a first portion of the gain of the differential variable gain amplifier adjustable through a control terminal coupled to a second terminal of each corresponding resistor;
- and
- wherein the second variable resistance comprises a second plurality of series-connected transistor devices and a second plurality of corresponding resistors, each transistor device of the second plurality of series-connected transistor devices having a gate terminal coupled to a first terminal of a corresponding resistor of the second plurality of corresponding resistors, a second portion of the gain of the differential variable gain amplifier adjustable through a control terminal coupled to a second terminal of each corresponding resistor.
Dependencies are inferred from the claim text.