Debugging using a virtual file system interface

An apparatus for controlling a circuit implemented in an integrated circuit device having programmable logic, the apparatus comprising:

• a processor coupled to the resources of the programmable logic, wherein the programmable logic includes a plurality of configurable clock management circuits of the programmable logic, each clock management circuit configurable to de-skew an input clock signal and provide an output clock signal from the de-skewed input clock signal, and configurable to change the frequency of an input clock signal and provide the output clock signal at the change frequency;
• a memory arrangement coupled to the processor and configured with program code that when executed by the processor causes the processor to perform operations including:
• maintaining a hierarchy of directories and files in a virtual file system that is registered with an operating system, wherein the directories and files are associated with resources of the integrated circuit device and each file represents a respective data set of configuration data for an associated one of the resources, a plurality of clock control files respectively associated with clock control circuits of the programmable logic and each clock control circuit coupled to a respective one of the configurable clock management circuits;
• wherein the operating system executes on the processor;
• storing a first value in each of the associated clock control circuits in response to a plurality of corresponding invocations of one or more operating system file access commands, each invocation referencing one of the clock control files and specifying the first value;
• and
• controlling advancement of each output clock signal from each clock management circuit of the programmable logic in response to the first value stored in the clock control circuits.

An article of manufacture, comprising:

• a non-transitory processor-readable storage medium configured with instructions for controlling a circuit implemented in an integrated circuit device having programmable logic, wherein the programmable logic includes a plurality of configurable clock management circuits of the programmable logic, each clock management circuit configurable to de-skew an input clock signal and provide an output clock signal from the de-skewed input clock signal, and configurable to change the frequency of an input clock signal and provide the output clock signal at the changed frequency, the instructions when executed by a processor coupled to the programmable logic, causing the processor to perform the steps including,
• maintaining a hierarchy of directories and files in a virtual file system that is registered with an operating system, wherein the directories and files are associated with resources of the programmable logic and each file represents a respective data set of configuration data for an associated one of the resources, a plurality of clock control files respectively associated with clock control circuits of the programmable logic and each clock control circuit coupled to a respective one of the configurable clock management circuits;
• wherein the operating system executes on the processor;
• storing a first value in each of the associated clock control circuits in response to a plurality of corresponding invocations of one or more operating system file access commands, each invocation referencing one of the clock control files and specifying the first value;
• and
• controlling advancement of each output clock signal from each clock management circuit of the programmable logic in response to the first value stored in the clock control circuits.