Transactional flow management interrupt debug architecture

An apparatus, comprising:

• a first processing unit;
• a second processing unit;
• a third processing unit;
• a first bus to exchange information between the first and second processing units;
• a second bus to exchange information between the second and third processing units;
• a first transaction flow monitoring device to monitor the first bus;
• a second transaction flow monitoring device to monitor the second bus;
• and
• an interrupt device coupled to the first and second transaction flow monitoring devices to interrupt execution of applications executing on at least two of the processing units responsive to a signal received from at least one of the first or second transaction flow monitoring devices.

A computer-readable storage medium having stored thereon instructions that when executed by a machine result in the following:

• monitoring a first bus to exchange data between a first processing system and a second processing system;
• monitoring a second bus to exchange data between the second processing system and a third processing system, wherein at least one of said monitorings is associated with a transaction flow monitoring device;
• and
• responsive to said monitoring of at least one of the first or second buses, interrupting execution of applications executing on at least two of the processing systems.

A system, comprising:

• a general processing unit;
• a graphics processing unit;
• a memory cross-bar control unit;
• a first bus to exchange information between the general processing unit and the graphics processing unit;
• a second bus to exchange information between the graphics processing unit and the memory cross-bar control unit;
• a first transactional flow management interrupt gate between the general processing unit and the first bus, wherein the first transactional flow management interrupt gate interrupts execution of a first application responsive to a detection of a data pattern on the first bus;
• a second transactional flow management interrupt gate between the second bus and the memory cross-bar control unit, wherein the second transactional flow management interrupt gate interrupts execution of a second application responsive to a detection of the data pattern on the second bus;
• and
• a digital output to provide a digital signal, associated with image information processed via the graphics processing unit, to a digital display device.