Clock data recovery and synchronization in interconnected devices

In a system having at least two devices in communication with each other, wherein a first device and a second device are coupled by a data transfer link, an apparatus for reducing a phase offset of a signal received at the first device, comprising:

• at the first device,
• a first receiver coupled to receive a first received signal from the data transfer link, wherein the first received signal was transmitted from the second device;
• a clock source that generates a clock signal;
• a phase comparator coupled to the first receiver and the clock source, the phase comparator determining a first phase offset between the first received signal and the clock signal;
• a control symbol generator coupled to the phase comparator and generating a control symbol based on the first phase offset;
• an encoder coupled to the control symbol generator, the encoder inserting the control symbol in a first transmit signal;
• a first transmitter coupled to the encoder and the data transfer link, wherein the first transmitter transfers the first transmit signal over the data transfer link to the second device;
• at the second device,
• a second receiver coupled to receive the first transmit signal from the data transfer link to form a second received signal;
• a phase lock loop coupled to receive the second received signal from the second receiver, the phase lock loop generating a recovered clock signal synchronized with the second received signal;
• a decoder coupled to the second receiver, the decoder extracting the control symbol from the second received signal;
• a phase compensator coupled to receive the control symbol and recovered clock signal, the phase compensator responding to the control symbol and the recovered clock signal to produce a second transmit signal having a phase shift in accordance with the control symbol;
• and
• a second transmitter coupled to the phase compensator and the data transfer link, the second transmitter transmitting the second transmit signal over the data transfer link to the first device, wherein at the first device, the first receiver receives the second transmit signal to form a compensated received signal having a second phase offset that is smaller than the first phase offset of the first received signal.

In a system having at least two devices in communication with each other, wherein a first device and a second device are coupled by a data transfer link, a method for reducing a phase offset of a signal received at the first device, comprising:

• at the first device,
• receiving a first received signal at the first device transmitted from the second device over the data transfer link;
• measuring the phase offset between the first received signal and a clock signal from a clock source in the first device to form a first phase offset;
• adjusting the clock signal by applying a phase shift in a direction opposite to the first phase offset to form a phase shifted clock signal;
• forming a first transmit signal in accordance with the phase shifted clock signal;
• transmitting the first transmit signal from the first device to the second device over the data transfer link;
• at the second device,
• receiving the first transmit signal to form a second received signal;
• applying a phase lock loop to the second received signal to produce a recovered clock signal;
• forming a second transmit signal in accordance with the recovered clock signal;
• transmitting the second transmit signal from the second device to the first device over the data transfer link;
• and
• at the first device,
• receiving the second transmit signal to form a compensated received signal, wherein a second phase offset of the compensated received signal is smaller than the first phase offset of the first received signal.

In a system having at least two devices in communication with each other, wherein a first device and a second device are coupled by a data transfer link, an apparatus for reducing a phase offset of a signal received at the first device, comprising:

• at the first device,
• a first receiver coupled to receive a first received signal from the data transfer link, wherein the first received signal was transmitted from the second device;
• a clock source that generates a clock signal;
• a phase comparator coupled to the first receiver and the clock source, the phase comparator determining a first phase offset between the first received signal and the clock signal;
• a clock phase adjuster coupled to receive the clock signal and the first phase offset, the clock phase adjuster applying a phase shift to the clock signal in a direction opposite to the first phase offset to form a phase shifted clock signal;
• a phase compensator coupled to receive the phase shifted clock signal and forming a first transmit signal in accordance with the phase shifted clock signal;
• a first transmitter coupled to the phase compensator and the data transfer link, wherein the first transmitter transmits the first transmit signal over the data transfer link to the second device;
• at the second device,
• a second receiver coupled to receive the first transmit signal from the data transfer link to form a second received signal;
• a phase lock loop coupled to receive the second received signal, the phase lock loop generating a recovered clock signal synchronized with the second received signal;
• and
• a second transmitter responding to the recovered clock signal to produce a second transmit signal synchronized with the recovered clock signal, the second transmitter transmitting the second transmit signal over the data transfer link to the first device, wherein at the first device, the first receiver receives the second transmit signal to form a compensated received signal having a second phase offset that is smaller than the first phase offset of the first received signal.